arm: allow DC instructions by default so SE mode works

diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index 5f8378e0924f05fb79deb8f4aab902ba18ef7fb7..38607a9aea35fe1058cbe91edc3625bb37c25b79 100644 (file)
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -200,6 +200,8 @@ ISA::clear()
     sctlr.rao2 = 1;
     sctlr.rao3 = 1;
     sctlr.rao4 = 0xf;  // SCTLR[6:3]
+    sctlr.uci = 1;
+    sctlr.dze = 1;
     miscRegs[MISCREG_SCTLR_NS] = sctlr;
     miscRegs[MISCREG_SCTLR_RST] = sctlr_rst;
     miscRegs[MISCREG_HCPTR] = 0;