gallium: turn PIPE_SHADER_CAP_DOUBLES into a screen capability
authorNicolai Hähnle <nicolai.haehnle@amd.com>
Fri, 27 Jan 2017 09:35:13 +0000 (10:35 +0100)
committerNicolai Hähnle <nicolai.haehnle@amd.com>
Thu, 2 Feb 2017 15:53:42 +0000 (16:53 +0100)
Make the cap consistent with PIPE_CAP_INT64.

Aside from the hypothetical case of using draw for vertex shaders (and
actually caring about doubles...), every implementation supports doubles
either nowhere or everywhere.

Also, st/mesa didn't even check the cap correctly in all supported
shader stages.

While at it, add a missing LLVM version check for 64-bit integers in
radeonsi. This is conservative: judging by the log, LLVM 3.8 might be
sufficient, but there are probably bugs that have been fixed since then.

v2: fix clover (Marek)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
19 files changed:
src/gallium/auxiliary/gallivm/lp_bld_limits.h
src/gallium/auxiliary/tgsi/tgsi_exec.h
src/gallium/docs/source/screen.rst
src/gallium/drivers/etnaviv/etnaviv_screen.c
src/gallium/drivers/freedreno/freedreno_screen.c
src/gallium/drivers/i915/i915_screen.c
src/gallium/drivers/llvmpipe/lp_screen.c
src/gallium/drivers/nouveau/nv30/nv30_screen.c
src/gallium/drivers/nouveau/nv50/nv50_screen.c
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
src/gallium/drivers/r300/r300_screen.c
src/gallium/drivers/r600/r600_pipe.c
src/gallium/drivers/radeonsi/si_pipe.c
src/gallium/drivers/softpipe/sp_screen.c
src/gallium/drivers/svga/svga_screen.c
src/gallium/drivers/vc4/vc4_screen.c
src/gallium/include/pipe/p_defines.h
src/gallium/state_trackers/clover/core/device.cpp
src/mesa/state_tracker/st_extensions.c

index d0a5afd8cb7e384503051a94f2004bebd9f234db..7a4c8e480cdc5a8535951154b263d03174a524fd 100644 (file)
@@ -133,8 +133,6 @@ gallivm_get_shader_param(enum pipe_shader_cap param)
    case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
    case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
       return 1;
-   case PIPE_SHADER_CAP_DOUBLES:
-      return 1;
    case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
    case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
    case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
index 489b7258934e01380fa986d0cc271aff4c922f5d..d78b3c819e84a54ceeba596435c1757f69d6e20b 100644 (file)
@@ -528,7 +528,6 @@ tgsi_exec_get_shader_param(enum pipe_shader_cap param)
       return 1 << PIPE_SHADER_IR_TGSI;
    case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
       return 1;
-   case PIPE_SHADER_CAP_DOUBLES:
    case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
    case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
       return 1;
index 2bfcd9ff0ab87d0a17efb3dbd28b77c002410d32..4f5b4bb9c665993d23a0bba65aff24a651ef2312 100644 (file)
@@ -373,6 +373,9 @@ The integer capabilities:
   opcode to retrieve the current value in the framebuffer.
 * ``PIPE_CAP_TGSI_MUL_ZERO_WINS``: Whether TGSI shaders support the
   ``TGSI_PROPERTY_MUL_ZERO_WINS`` shader property.
+* ``PIPE_CAP_DOUBLES``: Whether double precision floating-point operations
+  are supported.
+* ``PIPE_CAP_INT64``: Whether 64-bit integer operations are supported.
 
 
 .. _pipe_capf:
@@ -451,8 +454,6 @@ to be 0.
   program.  It should be one of the ``pipe_shader_ir`` enum values.
 * ``PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS``: The maximum number of texture
   sampler views. Must not be lower than PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS.
-* ``PIPE_SHADER_CAP_DOUBLES``: Whether double precision floating-point
-  operations are supported.
 * ``PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED``: Whether double precision rounding
   is supported. If it is, DTRUNC/DCEIL/DFLR/DROUND opcodes may be used.
 * ``PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED``: Whether DFRACEXP and
index 57634201131759d67a090c4b8b80732347d819a4..8f2882f57310805c7ad8f8018316bb532547b3cc 100644 (file)
@@ -241,6 +241,7 @@ etna_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
    case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
    case PIPE_CAP_TGSI_FS_FBFETCH:
    case PIPE_CAP_TGSI_MUL_ZERO_WINS:
+   case PIPE_CAP_DOUBLES:
    case PIPE_CAP_INT64:
       return 0;
 
@@ -415,7 +416,6 @@ etna_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
       return PIPE_SHADER_IR_TGSI;
    case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
       return 4096;
-   case PIPE_SHADER_CAP_DOUBLES:
    case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
    case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
    case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
index abb878708a1e5ea1e63f5612d21ef5b8905aeaa6..bc8a2772b678bac938842f63aaf733d04a781e68 100644 (file)
@@ -298,6 +298,7 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
        case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
        case PIPE_CAP_TGSI_FS_FBFETCH:
        case PIPE_CAP_TGSI_MUL_ZERO_WINS:
+       case PIPE_CAP_DOUBLES:
        case PIPE_CAP_INT64:
                return 0;
 
@@ -487,7 +488,6 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
                /* a2xx compiler doesn't handle indirect: */
                return is_ir3(screen) ? 1 : 0;
        case PIPE_SHADER_CAP_SUBROUTINES:
-       case PIPE_SHADER_CAP_DOUBLES:
        case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
        case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
        case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
index 07d1488f215165450e55ec1e94fcf2d3932f8aff..76f20fcc14cea1ddd254ba4ac130da196cf8e6a3 100644 (file)
@@ -161,7 +161,6 @@ i915_get_shader_param(struct pipe_screen *screen, unsigned shader, enum pipe_sha
       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
       case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
          return I915_TEX_UNITS;
-      case PIPE_SHADER_CAP_DOUBLES:
       case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
       case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
       case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
@@ -299,6 +298,7 @@ i915_get_param(struct pipe_screen *screen, enum pipe_cap cap)
    case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
    case PIPE_CAP_TGSI_FS_FBFETCH:
    case PIPE_CAP_TGSI_MUL_ZERO_WINS:
+   case PIPE_CAP_DOUBLES:
    case PIPE_CAP_INT64:
       return 0;
 
index 0982c35303e66790b215f9d1b58f391af63d9a21..0b12119201230910c0b9b742ae8365bc92c57964 100644 (file)
@@ -267,6 +267,7 @@ llvmpipe_get_param(struct pipe_screen *screen, enum pipe_cap param)
       return 1;
    case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
    case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
+   case PIPE_CAP_DOUBLES:
    case PIPE_CAP_INT64:
       return 1;
 
index 2451e012e5f8c05c855fd2fde5688a7a63178871..b43d85288c6f0e907538d967e37b9c99b1e22635 100644 (file)
@@ -208,6 +208,7 @@ nv30_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
    case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
    case PIPE_CAP_TGSI_FS_FBFETCH:
    case PIPE_CAP_TGSI_MUL_ZERO_WINS:
+   case PIPE_CAP_DOUBLES:
    case PIPE_CAP_INT64:
       return 0;
 
@@ -299,7 +300,6 @@ nv30_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
       case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
       case PIPE_SHADER_CAP_SUBROUTINES:
       case PIPE_SHADER_CAP_INTEGERS:
-      case PIPE_SHADER_CAP_DOUBLES:
       case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
       case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
       case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
@@ -348,7 +348,6 @@ nv30_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
       case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
       case PIPE_SHADER_CAP_SUBROUTINES:
       case PIPE_SHADER_CAP_INTEGERS:
-      case PIPE_SHADER_CAP_DOUBLES:
       case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
       case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
       case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
index cab0ce60293dc25e4f4a5b414a4f581078602876..32c3de32072a168f2b062437dc0df04a4866456a 100644 (file)
@@ -260,6 +260,7 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
    case PIPE_CAP_NATIVE_FENCE_FD:
    case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
    case PIPE_CAP_TGSI_FS_FBFETCH:
+   case PIPE_CAP_DOUBLES:
    case PIPE_CAP_INT64:
       return 0;
 
@@ -343,7 +344,6 @@ nv50_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
       return PIPE_SHADER_IR_TGSI;
    case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
       return 32;
-   case PIPE_SHADER_CAP_DOUBLES:
    case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
    case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
    case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
index 83885991819c8813f2dcd34c2b10d86355565864..b995cde0e2268e3f87ff6973a4c1e7d702305af6 100644 (file)
@@ -243,6 +243,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
    case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
    case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
    case PIPE_CAP_TGSI_MUL_ZERO_WINS:
+   case PIPE_CAP_DOUBLES:
       return 1;
    case PIPE_CAP_COMPUTE:
       return (class_3d < GP100_3D_CLASS);
@@ -373,8 +374,6 @@ nvc0_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
       return 1;
    case PIPE_SHADER_CAP_INTEGERS:
       return 1;
-   case PIPE_SHADER_CAP_DOUBLES:
-      return 1;
    case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
       return 1;
    case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
index 3e927e89a74b0c058f63100de5049ea9b219cc56..1410740731c2e764ccefa605748615af4365cdf5 100644 (file)
@@ -230,6 +230,7 @@ static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
         case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
         case PIPE_CAP_TGSI_FS_FBFETCH:
         case PIPE_CAP_TGSI_MUL_ZERO_WINS:
+        case PIPE_CAP_DOUBLES:
         case PIPE_CAP_INT64:
             return 0;
 
@@ -339,7 +340,6 @@ static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, e
         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
         case PIPE_SHADER_CAP_SUBROUTINES:
         case PIPE_SHADER_CAP_INTEGERS:
-        case PIPE_SHADER_CAP_DOUBLES:
         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
@@ -402,7 +402,6 @@ static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, e
         case PIPE_SHADER_CAP_INTEGERS:
         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
-        case PIPE_SHADER_CAP_DOUBLES:
         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
index e83ba32ef5a9566259271993e2b99e15f17f6b1e..2cc16b227a0a711771b92f18ee14886994c2595f 100644 (file)
@@ -381,6 +381,14 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_INT64:
                return 0;
 
+       case PIPE_CAP_DOUBLES:
+               if (rscreen->b.family == CHIP_ARUBA ||
+                   rscreen->b.family == CHIP_CAYMAN ||
+                   rscreen->b.family == CHIP_CYPRESS ||
+                   rscreen->b.family == CHIP_HEMLOCK)
+                       return 1;
+               return 0;
+
        case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
                if (family >= CHIP_CEDAR)
                        return 30;
@@ -555,7 +563,6 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e
        case PIPE_SHADER_CAP_SUPPORTED_IRS:
                return 0;
        case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
-       case PIPE_SHADER_CAP_DOUBLES:
                if (rscreen->b.family == CHIP_ARUBA ||
                    rscreen->b.family == CHIP_CAYMAN ||
                    rscreen->b.family == CHIP_CYPRESS ||
index 0bd82ebe853aa4b69b719c5b893e179f00dc436a..8ce4d50f99a9bb04c1e6552d75a404283792906c 100644 (file)
@@ -414,9 +414,13 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
        case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
        case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
-       case PIPE_CAP_INT64:
                return 1;
 
+       case PIPE_CAP_DOUBLES:
+               return HAVE_LLVM >= 0x0307;
+       case PIPE_CAP_INT64:
+               return HAVE_LLVM >= 0x0309;
+
        case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
                return !SI_BIG_ENDIAN && sscreen->b.info.has_userptr;
 
@@ -591,8 +595,6 @@ static int si_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enu
 
                        return ir;
                }
-               case PIPE_SHADER_CAP_DOUBLES:
-                       return HAVE_LLVM >= 0x0307;
 
                case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE: {
                        uint64_t max_const_buffer_size;
@@ -655,9 +657,6 @@ static int si_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enu
        case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
                return 1;
 
-       case PIPE_SHADER_CAP_DOUBLES:
-               return HAVE_LLVM >= 0x0307;
-
        case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
                /* TODO: Indirection of geometry shader input dimension is not
                 * handled yet
index ec530a4207feb41a3f24c5480e8dbef78988f943..fd7ce2508a2240c994e0f3883917d8c34645e124 100644 (file)
@@ -165,6 +165,7 @@ softpipe_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
    case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
    case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
+   case PIPE_CAP_DOUBLES:
    case PIPE_CAP_INT64:
       return 1;
    case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
index 85b3b63bea74effd8c76f34424ba54023f01f110..f404fb5fbd8a0ceb4020befd1fbb8b58f89132ee 100644 (file)
@@ -424,6 +424,7 @@ svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
    case PIPE_CAP_TGSI_FS_FBFETCH:
    case PIPE_CAP_TGSI_MUL_ZERO_WINS:
+   case PIPE_CAP_DOUBLES:
    case PIPE_CAP_INT64:
       return 0;
    }
@@ -498,7 +499,6 @@ vgpu9_get_shader_param(struct pipe_screen *screen, unsigned shader,
          return PIPE_SHADER_IR_TGSI;
       case PIPE_SHADER_CAP_SUPPORTED_IRS:
          return 0;
-      case PIPE_SHADER_CAP_DOUBLES:
       case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
       case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
       case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
@@ -561,7 +561,6 @@ vgpu9_get_shader_param(struct pipe_screen *screen, unsigned shader,
          return PIPE_SHADER_IR_TGSI;
       case PIPE_SHADER_CAP_SUPPORTED_IRS:
          return 0;
-      case PIPE_SHADER_CAP_DOUBLES:
       case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
       case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
       case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
@@ -657,7 +656,6 @@ vgpu10_get_shader_param(struct pipe_screen *screen, unsigned shader,
       return PIPE_SHADER_IR_TGSI;
    case PIPE_SHADER_CAP_SUPPORTED_IRS:
          return 0;
-   case PIPE_SHADER_CAP_DOUBLES:
    case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
    case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
    case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
index b0188859052624abd507e176ecda226800c10aef..76f12acb39f0d597ffe6c327bbb952094a651637 100644 (file)
@@ -244,6 +244,7 @@ vc4_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
         case PIPE_CAP_NATIVE_FENCE_FD:
         case PIPE_CAP_TGSI_FS_FBFETCH:
         case PIPE_CAP_TGSI_MUL_ZERO_WINS:
+        case PIPE_CAP_DOUBLES:
         case PIPE_CAP_INT64:
                 return 0;
 
@@ -391,7 +392,6 @@ vc4_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
                 return 0;
         case PIPE_SHADER_CAP_INTEGERS:
                 return 1;
-        case PIPE_SHADER_CAP_DOUBLES:
         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
index ff497bcd912ec225a97589fa05d0ff0b2cc12134..9915957590eff05babe6d0e595b1465338353332 100644 (file)
@@ -752,6 +752,7 @@ enum pipe_cap
    PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY,
    PIPE_CAP_TGSI_FS_FBFETCH,
    PIPE_CAP_TGSI_MUL_ZERO_WINS,
+   PIPE_CAP_DOUBLES,
    PIPE_CAP_INT64,
 };
 
@@ -813,7 +814,6 @@ enum pipe_shader_cap
    PIPE_SHADER_CAP_PREFERRED_IR,
    PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED,
    PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS,
-   PIPE_SHADER_CAP_DOUBLES,
    PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED, /* all rounding modes */
    PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED,
    PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED,
index 8f1c1da51362b468f487659e0f865971ad3592e3..158c9aa696499edf16a5b32deba3de3d8c3b906a 100644 (file)
@@ -186,8 +186,7 @@ device::image_support() const {
 
 bool
 device::has_doubles() const {
-   return pipe->get_shader_param(pipe, PIPE_SHADER_COMPUTE,
-                                 PIPE_SHADER_CAP_DOUBLES);
+   return pipe->get_param(pipe, PIPE_CAP_DOUBLES);
 }
 
 std::vector<size_t>
index 4600b88267dafa9f679494ca0e88c55942b21f76..4d46006827625254819c561a11c17d8414735357 100644 (file)
@@ -1160,10 +1160,7 @@ void st_init_extensions(struct pipe_screen *screen,
    }
 #endif
 
-   if (screen->get_shader_param(screen, PIPE_SHADER_VERTEX,
-                                PIPE_SHADER_CAP_DOUBLES) &&
-       screen->get_shader_param(screen, PIPE_SHADER_FRAGMENT,
-                                PIPE_SHADER_CAP_DOUBLES)) {
+   if (screen->get_param(screen, PIPE_CAP_DOUBLES)) {
       extensions->ARB_gpu_shader_fp64 = GL_TRUE;
       extensions->ARB_vertex_attrib_64bit = GL_TRUE;
    }