2007-01-04 Paul Brook <paul@codesourcery.com>

	gas/
	* config/tc-arm.c (do_cpsi): Set mmod bit for 2 argument form.
	gas/testsuite/
	* gas/arm/archv6.s: Add more cpsie tests.
	* gas/arm/archv6.d: Ditto.
	opcodes/
	* arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 096ed251e1ea6c79cf42c0377b0762d94ff91c43..2955f4ce994f2fa9b06da36bc5e0312dc903317a 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,7 @@
+2007-01-04  Paul Brook  <paul@codesourcery.com>
+
+       * config/tc-arm.c (do_cpsi): Set mmod bit for 2 argument form.
+
 2007-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 
        PR gas/3826

diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index a95fcb67feb30fa798beeb03d3f0d6f5669aee37..45b8d2e85dfc3dd385bd31cdbb96a6254c9d08ff 100644 (file)
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -548,6 +548,7 @@ struct asm_opcode
 #define INDEX_UP       0x00800000
 #define WRITE_BACK     0x00200000
 #define LDM_TYPE_2_OR_3        0x00400000
+#define CPSI_MMOD      0x00020000
 
 #define LITERAL_MASK   0xf000f000
 #define OPCODE_MASK    0xfe1fffff
@@ -6828,7 +6829,11 @@ static void
 do_cpsi (void)
 {
   inst.instruction |= inst.operands[0].imm << 6;
-  inst.instruction |= inst.operands[1].imm;
+  if (inst.operands[1].present)
+    {
+      inst.instruction |= CPSI_MMOD;
+      inst.instruction |= inst.operands[1].imm;
+    }
 }
 
 static void

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 40a58956ea33caf632645c8d3ad787e52289c806..df0a747fa943d620bb8e4022f69f0d7144d12117 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2007-01-04  Paul Brook  <paul@codesourcery.com>
+
+       * gas/arm/archv6.s: Add more cpsie tests.
+       * gas/arm/archv6.d: Ditto.
+
 2007-01-04  Andreas Schwab  <schwab@suse.de>
 
        * gas/m68k/cpu32.[sd]: New test.

diff --git a/gas/testsuite/gas/arm/archv6.d b/gas/testsuite/gas/arm/archv6.d
index 1dbaad3a714f990ed3f0d11d873fcc5ca14f6a73..ed78384de4178af3d3c49e4d6dbd7f4ad3b4151b 100644 (file)
--- a/gas/testsuite/gas/arm/archv6.d
+++ b/gas/testsuite/gas/arm/archv6.d
@@ -217,3 +217,5 @@ Disassembly of section .text:
 0+344 <[^>]*> e6ef2475 ?       uxtb r2,r5, ROR #8
 0+348 <[^>]*> 16ef2075 ?       uxtbne r2,r5
 0+34c <[^>]*> 16ef2475 ?       uxtbne r2,r5, ROR #8
+0+350 <[^>]*> f10a00ca ?       cpsie   if,#10
+0+354 <[^>]*> f10a00d5 ?       cpsie   if,#21

diff --git a/gas/testsuite/gas/arm/archv6.s b/gas/testsuite/gas/arm/archv6.s
index 50378b7c3798c23082c0e619a2ea28dadd630d30..d55c98f0a65eabef81b7b02dcb0c43cf19da8e50 100644 (file)
--- a/gas/testsuite/gas/arm/archv6.s
+++ b/gas/testsuite/gas/arm/archv6.s
@@ -214,3 +214,5 @@ label:
        uxtb r2, r5, ROR #8
        uxtbne r2, r5
        uxtbne r2, r5, ROR #8
+       cpsie if, #10
+       cpsie if, #21

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index d3985069270a917577d6c24729ef5f97783b5e9a..7e43932364ad0c14a8f9973d0709aefd74ecbaa9 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2007-01-04  Paul Brook  <paul@codesourcery.com>
+
+       * arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
+
 2007-01-04  Andreas Schwab  <schwab@suse.de>
 
        * m68k-opc.c: Fix encoding of signed bit in the cpu32 tbls insns.

diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index a1f250c10ec5f0e23984663c0d1a570a5a3e6f80..3523cabcd5d19f7471d16bf70c2949a618cc8fd0 100644 (file)
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -814,10 +814,10 @@ static const struct opcode32 arm_opcodes[] =
   {ARM_EXT_V6K, 0x0320f000, 0x0fffff00, "nop%c\t{%0-7d}"},
 
   /* ARM V6 instructions. */
-  {ARM_EXT_V6, 0xf1080000, 0xfffdfe3f, "cpsie\t%8'a%7'i%6'f"},
-  {ARM_EXT_V6, 0xf1080000, 0xfffdfe20, "cpsie\t%8'a%7'i%6'f,#%0-4d"},
-  {ARM_EXT_V6, 0xf10C0000, 0xfffdfe3f, "cpsid\t%8'a%7'i%6'f"},
-  {ARM_EXT_V6, 0xf10C0000, 0xfffdfe20, "cpsid\t%8'a%7'i%6'f,#%0-4d"},
+  {ARM_EXT_V6, 0xf1080000, 0xfffffe3f, "cpsie\t%8'a%7'i%6'f"},
+  {ARM_EXT_V6, 0xf10a0000, 0xfffffe20, "cpsie\t%8'a%7'i%6'f,#%0-4d"},
+  {ARM_EXT_V6, 0xf10C0000, 0xfffffe3f, "cpsid\t%8'a%7'i%6'f"},
+  {ARM_EXT_V6, 0xf10e0000, 0xfffffe20, "cpsid\t%8'a%7'i%6'f,#%0-4d"},
   {ARM_EXT_V6, 0xf1000000, 0xfff1fe20, "cps\t#%0-4d"},
   {ARM_EXT_V6, 0x06800010, 0x0ff00ff0, "pkhbt%c\t%12-15r, %16-19r, %0-3r"},
   {ARM_EXT_V6, 0x06800010, 0x0ff00070, "pkhbt%c\t%12-15r, %16-19r, %0-3r, LSL #%7-11d"},