sel-sched: remove assert in merge_fences (PR 87273)
authorAndrey Belevantsev <abel@ispras.ru>
Mon, 1 Apr 2019 15:20:13 +0000 (18:20 +0300)
committerAlexander Monakov <amonakov@gcc.gnu.org>
Mon, 1 Apr 2019 15:20:13 +0000 (18:20 +0300)
2019-04-01  Andrey Belevantsev  <abel@ispras.ru>

PR rtl-optimization/87273
* sel-sched-ir.c (merge_fences): Remove assert.

* gcc.dg/pr87273.c: New test.

From-SVN: r270059

gcc/ChangeLog
gcc/sel-sched-ir.c
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.dg/pr87273.c [new file with mode: 0644]

index 2b0a73afd58574907061034f527a7ac1be88fcd6..2f55f595f3f2ff32ad0fb52d9f17f5d85597e90d 100644 (file)
@@ -1,3 +1,8 @@
+2019-04-01  Andrey Belevantsev  <abel@ispras.ru>
+
+       PR rtl-optimization/87273
+       * sel-sched-ir.c (merge_fences): Remove assert.
+
 2019-04-01  Richard Biener  <rguenther@suse.de>
 
        PR tree-optimization/46590
index e8e508ef69213ddf10b66f99939969b686375bec..a6583017c9d49deed7928b09a71dd0007aabe9f6 100644 (file)
@@ -703,11 +703,6 @@ merge_fences (fence_t f, insn_t insn,
       else
         if (candidate->src == BLOCK_FOR_INSN (last_scheduled_insn))
           {
-            /* Would be weird if same insn is successor of several fallthrough
-               edges.  */
-            gcc_assert (BLOCK_FOR_INSN (insn)->prev_bb
-                        != BLOCK_FOR_INSN (last_scheduled_insn_old));
-
             state_free (FENCE_STATE (f));
             FENCE_STATE (f) = state;
 
index 15b32a254d169fb75cfbd0bb7f799b936832189b..6fd174640d3be331836dc626798daa1f0e5a8065 100644 (file)
@@ -1,3 +1,8 @@
+2019-04-01  Andrey Belevantsev  <abel@ispras.ru>
+
+       PR rtl-optimization/87273
+       * gcc.dg/pr87273.c: New test.
+
 2019-04-01  Martin Liska  <mliska@suse.cz>
 
        PR driver/89861
diff --git a/gcc/testsuite/gcc.dg/pr87273.c b/gcc/testsuite/gcc.dg/pr87273.c
new file mode 100644 (file)
index 0000000..43662f0
--- /dev/null
@@ -0,0 +1,20 @@
+/* { dg-do compile { target powerpc*-*-* ia64-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-options "-Os -fschedule-insns -fsel-sched-pipelining -fselective-scheduling -fno-ssa-phiopt -fno-tree-loop-im" } */
+/* { dg-additional-options "-march=core2" { target i?86-*-* x86_64-*-* } } */
+
+int sd;
+
+void
+w5 (int n4)
+{
+  long int *vq = (long int *) &n4;
+
+  while (n4 < 1)
+    {
+      int ks;
+
+      ks = !!(n4 + 1) ? ((++sd) == *vq) : 0;
+      if (ks == 1 / *vq)
+        *vq *= sd;
+    }
+}