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Added english language description, spaces and brackets for ld instruction
author
Shriya Sharma
<shriya@redsemiconductor.com>
Tue, 26 Sep 2023 10:54:19 +0000
(11:54 +0100)
committer
Shriya Sharma
<shriya@redsemiconductor.com>
Tue, 26 Sep 2023 10:54:19 +0000
(11:54 +0100)
openpower/isa/fixedload.mdwn
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diff --git
a/openpower/isa/fixedload.mdwn
b/openpower/isa/fixedload.mdwn
index a4e29c6b8a6ca930eb66d90c1876ff7556598414..e46633fca6e023eb8e47f57ecead190c6754a64c 100644
(file)
--- a/
openpower/isa/fixedload.mdwn
+++ b/
openpower/isa/fixedload.mdwn
@@
-498,6
+498,12
@@
Pseudo-code:
EA <- b + EXTS(DS || 0b00)
RT <- MEM(EA, 8)
+Description:
+
+ Let the effective address (EA) be the sum
+ (RA|0)+ (DS||0b00). The doubleword in storage
+ addressed by EA is loaded into RT.
+
Special Registers Altered:
None