arch-arm: move serialize and unserialize definition to cpp file
authorCiro Santilli <ciro.santilli@arm.com>
Thu, 15 Oct 2020 09:04:05 +0000 (10:04 +0100)
committerCiro Santilli <ciro.santilli@arm.com>
Mon, 16 Nov 2020 09:16:14 +0000 (09:16 +0000)
Change-Id: I9ac64184d3fe36617f474a714b228b55b9a90976
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/36115
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
src/arch/arm/isa.cc
src/arch/arm/isa.hh

index 217f432ac7cd5319814b4f80e957a3e78b158c33..9b1cde31f538cd282a42a951f2994c4c60aacaff 100644 (file)
@@ -2350,6 +2350,22 @@ ISA::zeroSveVecRegUpperPart(VecRegContainer &vc, unsigned eCount)
     }
 }
 
+void
+ISA::serialize(CheckpointOut &cp) const
+{
+    DPRINTF(Checkpoint, "Serializing Arm Misc Registers\n");
+    SERIALIZE_ARRAY(miscRegs, NUM_PHYS_MISCREGS);
+}
+
+void
+ISA::unserialize(CheckpointIn &cp)
+{
+    DPRINTF(Checkpoint, "Unserializing Arm Misc Registers\n");
+    UNSERIALIZE_ARRAY(miscRegs, NUM_PHYS_MISCREGS);
+    CPSR tmp_cpsr = miscRegs[MISCREG_CPSR];
+    updateRegMap(tmp_cpsr);
+}
+
 void
 ISA::addressTranslation64(TLB::ArmTranslationType tran_type,
     BaseTLB::Mode mode, Request::Flags flags, RegVal val)
index 4a824edce8fdc54cb836647ff44f7118086490f6..6b9dd3c70e8a730a2d99f9d60a80be5e5cc04ba9 100644 (file)
@@ -810,21 +810,8 @@ namespace ArmISA
         static void zeroSveVecRegUpperPart(VecRegContainer &vc,
                                            unsigned eCount);
 
-        void
-        serialize(CheckpointOut &cp) const override
-        {
-            DPRINTF(Checkpoint, "Serializing Arm Misc Registers\n");
-            SERIALIZE_ARRAY(miscRegs, NUM_PHYS_MISCREGS);
-        }
-
-        void
-        unserialize(CheckpointIn &cp) override
-        {
-            DPRINTF(Checkpoint, "Unserializing Arm Misc Registers\n");
-            UNSERIALIZE_ARRAY(miscRegs, NUM_PHYS_MISCREGS);
-            CPSR tmp_cpsr = miscRegs[MISCREG_CPSR];
-            updateRegMap(tmp_cpsr);
-        }
+        void serialize(CheckpointOut &cp) const override;
+        void unserialize(CheckpointIn &cp) override;
 
         void startup() override;