remove insertion of instruction as a comment

diff --git a/src/openpower/sv/trans/svp64.py b/src/openpower/sv/trans/svp64.py
index 6c4d98d56d58f1e7775da715b5b1e5c39b86418b..5e4095cd88253dc6207839f44a06dc094dc6a21a 100644 (file)
--- a/src/openpower/sv/trans/svp64.py
+++ b/src/openpower/sv/trans/svp64.py
@@ -1305,7 +1305,6 @@ class SVP64Asm:
             if not v30b_op.endswith('.'):
                 v30b_op += rc
             yield "%s %s" % (v30b_op, ", ".join(v30b_newfields))
-        yield f"# {insn}"
         log("new v3.0B fields", v30b_op, v30b_newfields)
 
     def translate(self, lst):