foreach_instr_safe (instr, &block->instr_list) {
struct ir3_register *reg;
- foreach_src(reg, instr) {
+ foreach_src (reg, instr) {
struct ir3_instruction *src = reg->instr;
if (!src)
ctx->addr_ht[i] = NULL;
}
- nir_foreach_instr(instr, nblock) {
+ nir_foreach_instr (instr, nblock) {
ctx->cur_instr = instr;
emit_instr(ctx, instr);
ctx->cur_instr = NULL;
static void
emit_cf_list(struct ir3_context *ctx, struct exec_list *list)
{
- foreach_list_typed(nir_cf_node, node, node, list) {
+ foreach_list_typed (nir_cf_node, node, node, list) {
switch (node->type) {
case nir_cf_node_block:
emit_block(ctx, nir_cf_node_as_block(node));
struct ir3_instruction *components[4];
unsigned mask = (1 << (ncomp + frac)) - 1;
- foreach_input(in, ctx->ir) {
+ foreach_input (in, ctx->ir) {
if (in->input.inidx == n) {
input = in;
break;
max_drvloc(struct exec_list *vars)
{
int drvloc = -1;
- nir_foreach_variable(var, vars) {
+ nir_foreach_variable (var, vars) {
drvloc = MAX2(drvloc, (int)var->data.driver_location);
}
return drvloc;
}
/* Setup inputs: */
- nir_foreach_variable(var, &ctx->s->inputs) {
+ nir_foreach_variable (var, &ctx->s->inputs) {
setup_input(ctx, var);
}
}
/* Setup outputs: */
- nir_foreach_variable(var, &ctx->s->outputs) {
+ nir_foreach_variable (var, &ctx->s->outputs) {
setup_output(ctx, var);
}
/* Find # of samplers: */
- nir_foreach_variable(var, &ctx->s->uniforms) {
+ nir_foreach_variable (var, &ctx->s->uniforms) {
ctx->so->num_samp += glsl_type_get_sampler_count(var->type);
/* just assume that we'll be reading from images.. if it
* is write-only we don't have to count it, but not sure
}
/* NOTE: need to do something more clever when we support >1 fxn */
- nir_foreach_register(reg, &fxn->registers) {
+ nir_foreach_register (reg, &fxn->registers) {
ir3_declare_array(ctx, reg);
}
/* And emit the body: */
/* fixup outidx to point to new output table entry: */
struct ir3_instruction *out;
- foreach_output(out, ir) {
+ foreach_output (out, ir) {
if (out->collect.outidx == i) {
out->collect.outidx = j;
break;
struct ir3_instruction *instr, *precolor[2];
int idx = 0;
- foreach_input(instr, ir) {
+ foreach_input (instr, ir) {
if (instr->input.sysval != SYSTEM_VALUE_BARYCENTRIC_PERSP_PIXEL)
continue;
so->outputs[i].regid = INVALID_REG;
struct ir3_instruction *out;
- foreach_output(out, ir) {
+ foreach_output (out, ir) {
assert(out->opc == OPC_META_COLLECT);
unsigned outidx = out->collect.outidx;
}
struct ir3_instruction *in;
- foreach_input(in, ir) {
+ foreach_input (in, ir) {
assert(in->opc == OPC_META_INPUT);
unsigned inidx = in->input.inidx;
bool progress;
do {
progress = false;
- foreach_src_n(reg, n, instr) {
+ foreach_src_n (reg, n, instr) {
struct ir3_instruction *src = ssa(reg);
if (!src)
*/
debug_assert(instr->deps_count == 0);
- foreach_ssa_src(src, instr) {
+ foreach_ssa_src (src, instr) {
src->use_count++;
}
}
ir3_clear_mark(ir);
struct ir3_instruction *out;
- foreach_output_n(out, n, ir) {
+ foreach_output_n (out, n, ir) {
instr_cp(&ctx, out);
ir->outputs[n] = eliminate_output_mov(out);
}
instr->depth = 0;
- foreach_ssa_src_n(src, i, instr) {
+ foreach_ssa_src_n (src, i, instr) {
unsigned sd;
/* visit child to compute it's depth: */
}
struct ir3_instruction *out;
- foreach_output(out, ir)
+ foreach_output (out, ir)
ir3_instr_depth(out, 0, false);
foreach_block (block, &ir->block_list) {
/* cleanup unused inputs: */
struct ir3_instruction *in;
- foreach_input_n(in, n, ir)
+ foreach_input_n (in, n, ir)
if (in->flags & IR3_INSTR_UNUSED)
ir->inputs[n] = NULL;
if (instr->opc == OPC_META_COLLECT)
group_n(&instr_ops, instr, instr->regs_count - 1);
- foreach_ssa_src(src, instr)
+ foreach_ssa_src (src, instr)
instr_find_neighbors(src);
}
unsigned i;
struct ir3_instruction *out;
- foreach_output(out, ir)
+ foreach_output (out, ir)
instr_find_neighbors(out);
foreach_block (block, &ir->block_list) {
* their src register(s):
*/
if (is_tex(n) || is_sfu(n) || is_mem(n)) {
- foreach_src(reg, n) {
+ foreach_src (reg, n) {
if (reg_gpr(reg))
regmask_set(&state->needs_ss_war, reg);
}
ir3_nir_scan_driver_consts(nir_shader *shader,
struct ir3_const_state *layout)
{
- nir_foreach_function(function, shader) {
+ nir_foreach_function (function, shader) {
if (!function->impl)
continue;
- nir_foreach_block(block, function->impl) {
- nir_foreach_instr(instr, block) {
+ nir_foreach_block (block, function->impl) {
+ nir_foreach_instr (instr, block) {
if (instr->type != nir_instr_type_intrinsic)
continue;
memset(state, 0, sizeof(*state));
- nir_foreach_function(function, nir) {
+ nir_foreach_function (function, nir) {
if (function->impl) {
- nir_foreach_block(block, function->impl) {
- nir_foreach_instr(instr, block) {
+ nir_foreach_block (block, function->impl) {
+ nir_foreach_instr (instr, block) {
if (instr->type == nir_instr_type_intrinsic &&
nir_instr_as_intrinsic(instr)->intrinsic == nir_intrinsic_load_ubo)
gather_ubo_ranges(nir, nir_instr_as_intrinsic(instr), state);
}
state->size = offset;
- nir_foreach_function(function, nir) {
+ nir_foreach_function (function, nir) {
if (function->impl) {
nir_builder builder;
nir_builder_init(&builder, function->impl);
- nir_foreach_block(block, function->impl) {
- nir_foreach_instr_safe(instr, block) {
+ nir_foreach_block (block, function->impl) {
+ nir_foreach_instr_safe (instr, block) {
if (instr->type == nir_instr_type_intrinsic &&
nir_instr_as_intrinsic(instr)->intrinsic == nir_intrinsic_load_ubo)
lower_ubo_load_to_uniform(nir_instr_as_intrinsic(instr), &builder, state);
{
bool progress = false;
- nir_foreach_instr_safe(instr, block) {
+ nir_foreach_instr_safe (instr, block) {
if (instr->type != nir_instr_type_intrinsic)
continue;
nir_builder_init(&b, impl);
bool progress = false;
- nir_foreach_block_safe(block, impl) {
+ nir_foreach_block_safe (block, impl) {
progress |= lower_io_offsets_block(block, &b, mem_ctx);
}
{
bool progress = false;
- nir_foreach_function(function, shader) {
+ nir_foreach_function (function, shader) {
if (function->impl)
progress |= lower_io_offsets_func(function->impl);
}
static nir_variable *
get_var(struct exec_list *list, int driver_location)
{
- nir_foreach_variable(v, list) {
+ nir_foreach_variable (v, list) {
if (v->data.driver_location == driver_location) {
return v;
}
static void
build_primitive_map(nir_shader *shader, struct primitive_map *map, struct exec_list *list)
{
- nir_foreach_variable(var, list) {
+ nir_foreach_variable (var, list) {
switch (var->data.location) {
case VARYING_SLOT_TESS_LEVEL_OUTER:
case VARYING_SLOT_TESS_LEVEL_INNER:
static void
lower_vs_block(nir_block *block, nir_builder *b, struct state *state)
{
- nir_foreach_instr_safe(instr, block) {
+ nir_foreach_instr_safe (instr, block) {
if (instr->type != nir_instr_type_intrinsic)
continue;
else
state.header = nir_load_gs_header_ir3(&b);
- nir_foreach_block_safe(block, impl)
+ nir_foreach_block_safe (block, impl)
lower_vs_block(block, &b, &state);
nir_metadata_preserve(impl, nir_metadata_block_index |
static void
lower_tess_ctrl_block(nir_block *block, nir_builder *b, struct state *state)
{
- nir_foreach_instr_safe(instr, block) {
+ nir_foreach_instr_safe (instr, block) {
if (instr->type != nir_instr_type_intrinsic)
continue;
state.header = nir_load_tcs_header_ir3(&b);
- nir_foreach_block_safe(block, impl)
+ nir_foreach_block_safe (block, impl)
lower_tess_ctrl_block(block, &b, &state);
/* Now move the body of the TCS into a conditional:
static void
lower_tess_eval_block(nir_block *block, nir_builder *b, struct state *state)
{
- nir_foreach_instr_safe(instr, block) {
+ nir_foreach_instr_safe (instr, block) {
if (instr->type != nir_instr_type_intrinsic)
continue;
nir_builder b;
nir_builder_init(&b, impl);
- nir_foreach_block_safe(block, impl)
+ nir_foreach_block_safe (block, impl)
lower_tess_eval_block(block, &b, &state);
nir_metadata_preserve(impl, 0);
{
nir_intrinsic_instr *outputs[32] = {};
- nir_foreach_instr_safe(instr, block) {
+ nir_foreach_instr_safe (instr, block) {
if (instr->type != nir_instr_type_intrinsic)
continue;
{
uint32_t components[32] = {};
- nir_foreach_variable(var, list) {
+ nir_foreach_variable (var, list) {
uint32_t mask =
((1 << glsl_get_components(glsl_without_array(var->type))) - 1) << var->data.location_frac;
components[var->data.driver_location] |= mask;
}
- nir_foreach_variable_safe(var, list) {
+ nir_foreach_variable_safe (var, list) {
uint32_t mask =
((1 << glsl_get_components(glsl_without_array(var->type))) - 1) << var->data.location_frac;
bool subset =
build_primitive_map(shader, &state.map, &shader->inputs);
uint32_t loc = 0;
- nir_foreach_variable(var, &shader->outputs) {
+ nir_foreach_variable (var, &shader->outputs) {
uint32_t end = var->data.driver_location + glsl_count_attribute_slots(var->type, false);
loc = MAX2(loc, end);
}
state.header = nir_load_gs_header_ir3(&b);
- nir_foreach_variable(var, &shader->outputs) {
+ nir_foreach_variable (var, &shader->outputs) {
state.output_vars[var->data.driver_location] =
nir_local_variable_create(impl, var->type,
ralloc_asprintf(var, "%s:gs-temp", var->name));
nir_store_var(&b, state.emitted_vertex_var, nir_imm_int(&b, 0), 0x1);
nir_store_var(&b, state.vertex_flags_var, nir_imm_int(&b, 4), 0x1);
- nir_foreach_block_safe(block, impl)
+ nir_foreach_block_safe (block, impl)
lower_gs_block(block, &b, &state);
set_foreach(impl->end_block->predecessors, block_entry) {
{
bool progress = false;
- nir_foreach_instr_safe(instr, block) {
+ nir_foreach_instr_safe (instr, block) {
if (instr->type != nir_instr_type_tex)
continue;
assert(shader->info.stage == MESA_SHADER_FRAGMENT);
- nir_foreach_function(function, shader) {
+ nir_foreach_function (function, shader) {
/* Only texture sampling instructions inside the main function
* are eligible for pre-dispatch.
*/
{
bool progress = false;
- nir_foreach_instr_safe(instr, block) {
+ nir_foreach_instr_safe (instr, block) {
if (instr->type != nir_instr_type_intrinsic)
continue;
print_block(block, 0);
struct ir3_instruction *out;
- foreach_output_n(out, i, ir) {
+ foreach_output_n (out, i, ir) {
printf("out%d: ", i);
print_instr(out, 0);
}
}
}
- foreach_src(reg, instr) {
+ foreach_src (reg, instr) {
if (reg->flags & IR3_REG_ARRAY) {
struct ir3_array *arr =
ir3_lookup_array(ctx->ir, reg->array.id);
* component. This shows up in splits coming out of
* a tex instruction w/ wrmask=.z, for example.
*/
- if (ctx->scalar_pass && (instr->opc == OPC_META_SPLIT) &&
+ if ((instr->opc == OPC_META_SPLIT) &&
!(i == instr->split.off))
continue;
/* update livein: */
for (unsigned i = 0; i < bitset_words; i++) {
+ /* anything used but not def'd within a block is
+ * by definition a live value coming into the block:
+ */
BITSET_WORD new_livein =
(bd->use[i] | (bd->liveout[i] & ~bd->def[i]));
succ_bd = succ->data;
for (unsigned i = 0; i < bitset_words; i++) {
+ /* add anything that is livein in a successor block
+ * to our liveout:
+ */
BITSET_WORD new_liveout =
(succ_bd->livein[i] & ~bd->liveout[i]);
/* need to fix things up to keep outputs live: */
struct ir3_instruction *out;
- foreach_output(out, ir) {
+ foreach_output (out, ir) {
unsigned name = ra_name(ctx, &ctx->instrd[out->ip]);
ctx->use[name] = ctx->instr_cnt;
}
}
}
- foreach_src_n(reg, n, instr) {
+ foreach_src_n (reg, n, instr) {
struct ir3_instruction *src = reg->instr;
if (src && !should_assign(ctx, src) && !should_assign(ctx, instr))
{
struct ir3_instruction *src;
- foreach_ssa_src_n(src, n, instr) {
+ foreach_ssa_src_n (src, n, instr) {
if (__is_false_dep(instr, n))
continue;
if (instr->block != src->block)
debug_assert(is_scheduled(orig_instr));
- foreach_ssa_src_n(src, n, new_instr) {
+ foreach_ssa_src_n (src, n, new_instr) {
if (__is_false_dep(new_instr, n))
continue;
if (is_half(new_instr)) {
{
struct ir3_instruction *src;
- foreach_ssa_src_n(src, n, instr) {
+ foreach_ssa_src_n (src, n, instr) {
if (__is_false_dep(instr, n))
continue;
use_instr(src);
/* Shader outputs are also used:
*/
struct ir3_instruction *out;
- foreach_output(out, ir)
+ foreach_output (out, ir)
use_instr(out);
}
could_sched(struct ir3_instruction *instr, struct ir3_instruction *src)
{
struct ir3_instruction *other_src;
- foreach_ssa_src(other_src, instr) {
+ foreach_ssa_src (other_src, instr) {
/* if dependency not scheduled, we aren't ready yet: */
if ((src != other_src) && !is_scheduled(other_src)) {
return false;
}
/* find unscheduled srcs: */
- foreach_ssa_src(src, instr) {
+ foreach_ssa_src (src, instr) {
if (!is_scheduled(src) && (src->block == instr->block)) {
debug_assert(nsrcs < ARRAY_SIZE(srcs));
srcs[nsrcs++] = src;
int new_live = dest_regs(instr);
int old_live = 0;
- foreach_ssa_src_n(src, n, instr) {
+ foreach_ssa_src_n (src, n, instr) {
if (__is_false_dep(instr, n))
continue;
struct ir3_instruction *src2;
bool last_use = true;
- foreach_ssa_src(src2, src) {
+ foreach_ssa_src (src2, src) {
if (src2->use_count > 1) {
last_use = false;
break;
static bool
lower_output_var(nir_shader *nir, int location)
{
- nir_foreach_variable(var, &nir->outputs) {
+ nir_foreach_variable (var, &nir->outputs) {
if (var->data.driver_location == location &&
((var->data.precision == GLSL_PRECISION_MEDIUM) ||
(var->data.precision == GLSL_PRECISION_LOW))) {
nir_builder b;
nir_builder_init(&b, impl);
- nir_foreach_block_safe(block, impl) {
- nir_foreach_instr_safe(instr, block) {
+ nir_foreach_block_safe (block, impl) {
+ nir_foreach_instr_safe (instr, block) {
if (instr->type != nir_instr_type_intrinsic)
continue;
unsigned i;
struct ir3_instruction *instr;
- foreach_input_n(instr, i, ir) {
+ foreach_input_n (instr, i, ir) {
reg = instr->regs[0];
regid = reg->num;
fprintf(out, "@in(%sr%d.%c)\tin%d",
fetch->wrmask, fetch->cmd);
}
- foreach_output_n(instr, i, ir) {
+ foreach_output_n (instr, i, ir) {
reg = instr->regs[0];
regid = reg->num;
fprintf(out, "@out(%sr%d.%c)\tout%d",
/* TODO I think including false-deps in the calculation is the right
* thing to do:
*/
- foreach_ssa_src_n(src, n, instr) {
+ foreach_ssa_src_n (src, n, instr) {
if (__is_false_dep(instr, n))
continue;
if (src->block != instr->block) {
ir3_clear_mark(ir);
struct ir3_instruction *out;
- foreach_output(out, ir)
+ foreach_output (out, ir)
max = MAX2(max, number_instr(out));
foreach_block (block, &ir->block_list) {