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diff --git a/openpower/sv/svp64.mdwn b/openpower/sv/svp64.mdwn
index 591afccddc8315b748e2f2c6e2c2e4d8438f0654..5ffc33a7da9d9e41e74e686b85e07bf7a0330442 100644 (file)
--- a/openpower/sv/svp64.mdwn
+++ b/openpower/sv/svp64.mdwn
@@ -38,7 +38,7 @@ Table of contents
 
 # Introduction
 
-This document focuses on the encoding of [[SV|sv]], and assumes familiarity with the same. It does not cover how SV works (merely the instruction encoding), and is therefore best read in conjunction with the [[sv/overview]].
+This document focuses on the encoding of [[SV|sv]], and assumes familiarity with the same. It does not cover how SV works (merely the instruction encoding), and is therefore best read in conjunction with the [[sv/overview]], as well as the [[sv/svp64_quirks]] section.
 
 All bit numbers are in MSB0 form (the bits are numbered from 0 at the MSB
 and counting up as you move to the LSB end). All bit ranges are inclusive