+2015-07-10 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/66819
+ * config/i386/i386.c (ix86_function_ok_for_sibcall): Allow
+ indirect sibcall with register arguments if register available
+ for argument passing.
+ (init_cumulative_args): Set cfun->machine->arg_reg_available
+ to (cum->nregs > 0) or to true if function has a variable
+ argument list.
+ (function_arg_advance_32): Set cfun->machine->arg_reg_available
+ to false if cum->nregs <= 0.
+ * config/i386/i386.h (machine_function): Add arg_reg_available.
+
2015-07-10 Uros Bizjak <ubizjak@gmail.com>
* config/i386/sse.md (movdi_to_sse): Use gen_lowpart
if (!decl
|| (TARGET_DLLIMPORT_DECL_ATTRIBUTES && DECL_DLLIMPORT_P (decl)))
{
- if (ix86_function_regparm (type, NULL) >= 3)
- {
- /* ??? Need to count the actual number of registers to be used,
- not the possible number of registers. Fix later. */
- return false;
- }
+ /* Check if regparm >= 3 since arg_reg_available is set to
+ false if regparm == 0. If regparm is 1 or 2, there is
+ always a call-clobbered register available.
+
+ ??? The symbol indirect call doesn't need a call-clobbered
+ register. But we don't know if this is a symbol indirect
+ call or not here. */
+ if (ix86_function_regparm (type, NULL) >= 3
+ && !cfun->machine->arg_reg_available)
+ return false;
}
}
if (stdarg_p (fntype))
{
cum->nregs = 0;
+ /* Since in 32-bit, variable arguments are always passed on
+ stack, there is scratch register available for indirect
+ sibcall. */
+ cfun->machine->arg_reg_available = true;
cum->sse_nregs = 0;
cum->mmx_nregs = 0;
cum->warn_avx512f = false;
and DFmode arguments. Warn for mismatching ABI. */
cum->float_in_sse = ix86_function_sseregparm (fntype, fndecl, true);
}
+
+ cfun->machine->arg_reg_available = (cum->nregs > 0);
}
/* Return the "natural" mode for TYPE. In most cases, this is just TYPE_MODE.
if (cum->nregs <= 0)
{
cum->nregs = 0;
+ cfun->machine->arg_reg_available = false;
cum->regno = 0;
}
break;
/* If true, it is safe to not save/restore DRAP register. */
BOOL_BITFIELD no_drap_save_restore : 1;
+ /* If true, there is register available for argument passing. This
+ is used only in ix86_function_ok_for_sibcall by 32-bit to determine
+ if there is scratch register available for indirect sibcall. In
+ 64-bit, rax, r10 and r11 are scratch registers which aren't used to
+ pass arguments and can be used for indirect sibcall. */
+ BOOL_BITFIELD arg_reg_available : 1;
+
/* During prologue/epilogue generation, the current frame state.
Otherwise, the frame state at the end of the prologue. */
struct machine_frame_state fs;
+2015-07-10 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/66819
+ * gcc.target/i386/pr66819-1.c: New test.
+ * gcc.target/i386/pr66819-2.c: Likewise.
+ * gcc.target/i386/pr66819-3.c: Likewise.
+ * gcc.target/i386/pr66819-4.c: Likewise.
+ * gcc.target/i386/pr66819-5.c: Likewise.
+
2015-07-10 Uros Bizjak <ubizjak@gmail.com>
PR target/66703
--- /dev/null
+/* { dg-do compile { target ia32 } } */
+/* { dg-options "-O2 -mregparm=3" } */
+/* { dg-final { scan-assembler-not "call" } } */
+
+void foo(void (*bar)(void))
+{
+ bar();
+}
--- /dev/null
+/* { dg-do compile { target ia32 } } */
+/* { dg-options "-fPIC -O2 -mregparm=3" } */
+/* { dg-final { scan-assembler-not "call" } } */
+
+void foo(void (*bar)(void))
+{
+ bar();
+}
--- /dev/null
+/* { dg-do compile { target ia32 } } */
+/* { dg-options "-O2 -mregparm=3" } */
+/* { dg-final { scan-assembler-not "call" } } */
+
+void (*bar)(int, int);
+
+void foo(int i, int j)
+{
+ bar(i, j);
+}
--- /dev/null
+/* { dg-do compile { target ia32 } } */
+/* { dg-options "-O2 -mregparm=3" } */
+/* { dg-final { scan-assembler-not "call" } } */
+
+#include <stdarg.h>
+
+void (*bar)(int, va_list);
+
+void foo(int i, va_list args)
+{
+ bar(i, args);
+}
--- /dev/null
+/* { dg-do compile { target ia32 } } */
+/* { dg-options "-O2 -mregparm=3" } */
+/* { dg-final { scan-assembler "call" } } */
+
+void (*bar)(int, int, int);
+
+void foo(int i, int j, int k)
+{
+ bar(i, j, k);
+}