- Added "xilinx_srl" for Xilinx shift register extraction
- Removed "shregmap -tech xilinx" (superseded by "xilinx_srl")
- Added "_TECHMAP_WIREINIT_*_" attribute and "_TECHMAP_REMOVEINIT_*_" wire for "techmap" pass
+ - Added "-match-init" option to "dff2dffs" pass
+ - Added +/mul2dsp.v for decomposing wide multipliers to custom-sized ones
+ - Added "xilinx_dsp" for Xilinx DSP packing
+ - "synth_xilinx" to now infer DSP blocks (-nodsp to disable)
+ - "synth_ecp5" to now infer DSP blocks (-nodsp to disable, experimental)
+ - "synth_ice40 -dsp" to infer DSP blocks
Yosys 0.8 .. Yosys 0.9
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