Add comment for lack of tristate logic pointing to #1225

diff --git a/tests/xilinx/tribuf.ys b/tests/xilinx/tribuf.ys
index 76b00647d21ce806ad61fc5f824107e52cfadca6..696be2620cb246024f94c4aadbecb41eb02fd99f 100644 (file)
--- a/tests/xilinx/tribuf.ys
+++ b/tests/xilinx/tribuf.ys
@@ -7,6 +7,6 @@ synth
 equiv_opt -assert -map +/xilinx/cells_sim.v -map +/simcells.v synth_xilinx # equivalency check
 design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
 cd top # Constrain all select calls below inside the top module
-#Xilinx Vivado synthesizes OBUFT cell for this case. Need support it.
+# TODO :: Tristate logic not yet supported; see https://github.com/YosysHQ/yosys/issues/1225
 select -assert-count 1 t:$_TBUF_
 select -assert-none t:$_TBUF_ %% t:* %D