add svshape2 to ISACaller

first recognising the persistence mode bit, second as not an illegal op

diff --git a/src/openpower/decoder/isa/caller.py b/src/openpower/decoder/isa/caller.py
index 4c8c0c070c5e1896bdbc365a1eda0f7b8d4a9b5a..2d8defab90cfcc6ddfc488448a48cef90fc4a7b1 100644 (file)
--- a/src/openpower/decoder/isa/caller.py
+++ b/src/openpower/decoder/isa/caller.py
@@ -1180,7 +1180,8 @@ class ISACaller(ISACallerHelper, ISAFPHelpers):
         if dotstrp in [ 'fsins', 'fcoss',
                     'ffmadds', 'fdmadds', 'ffadds',
                      'mins', 'maxs', 'minu', 'maxu',
-                    'setvl', 'svindex', 'svremap', 'svstep', 'svshape',
+                    'setvl', 'svindex', 'svremap', 'svstep',
+                    'svshape', 'svshape2',
                     'grev', 'ternlogi', 'bmask', 'cprop',
                     'absdu', 'absds', 'absdacs', 'absdacu', 'avgadd',
                     'fmvis', 'fishmv',
@@ -1652,7 +1653,7 @@ class ISACaller(ISACallerHelper, ISAFPHelpers):
         # to be able to know if it should apply in the next instruction.
         # also (if going to use this instruction) should disable ability
         # to interrupt in between. sigh.
-        self.last_op_svshape = asmop in ['svremap', 'svindex']
+        self.last_op_svshape = asmop in ['svremap', 'svindex', 'svshape2']
 
         return True