void *
brw_bo_map_unsynchronized(struct brw_context *brw, struct brw_bo *bo)
{
- struct brw_bufmgr *bufmgr = bo->bufmgr;
-
- /* If the CPU cache isn't coherent with the GTT, then use a
- * regular synchronized mapping. The problem is that we don't
- * track where the buffer was last used on the CPU side in
- * terms of brw_bo_map_cpu vs brw_bo_map_gtt, so
- * we would potentially corrupt the buffer even when the user
- * does reasonable things.
- */
- if (!bufmgr->has_llc)
- return brw_bo_map_gtt(brw, bo, MAP_READ | MAP_WRITE);
- else
- return brw_bo_map_gtt(brw, bo, MAP_READ | MAP_WRITE | MAP_ASYNC);
+ return brw_bo_map_gtt(brw, bo, MAP_READ | MAP_WRITE | MAP_ASYNC);
}
static bool
return obj->Mappings[index].Pointer;
}
- void *map;
- if (access & GL_MAP_UNSYNCHRONIZED_BIT) {
- if (!brw->has_llc && brw->perf_debug &&
- brw_bo_busy(intel_obj->buffer)) {
- perf_debug("MapBufferRange with GL_MAP_UNSYNCHRONIZED_BIT stalling (it's actually synchronized on non-LLC platforms)\n");
- }
- map = brw_bo_map_unsynchronized(brw, intel_obj->buffer);
- } else {
- map = brw_bo_map(brw, intel_obj->buffer, access);
+ void *map = brw_bo_map(brw, intel_obj->buffer, access);
+ if (!(access & GL_MAP_UNSYNCHRONIZED_BIT)) {
mark_buffer_inactive(intel_obj);
}