sparc: Delete some commented out code in the TLB.

Change-Id: I80c455403422ec35bafa1f3ed86628f8327d1da0
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26403
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>

diff --git a/src/arch/sparc/tlb.cc b/src/arch/sparc/tlb.cc
index f569bbc55f6a021426118d56a31c3b6291645647..f891b0c0663f8892057a4218dd74b5c37d61646b 100644 (file)
--- a/src/arch/sparc/tlb.cc
+++ b/src/arch/sparc/tlb.cc
@@ -97,17 +97,10 @@ TLB::insert(Addr va, int partition_id, int context_id, bool real,
 {
     MapIter i;
     TlbEntry *new_entry = NULL;
-//    TlbRange tr;
     int x;
 
     cacheValid = false;
     va &= ~(PTE.size()-1);
- /*   tr.va = va;
-    tr.size = PTE.size() - 1;
-    tr.contextId = context_id;
-    tr.partitionId = partition_id;
-    tr.real = real;
-*/
 
     DPRINTF(TLB,
         "TLB: Inserting Entry; va=%#x pa=%#x pid=%d cid=%d r=%d entryid=%d\n",
@@ -659,12 +652,6 @@ TLB::translateData(const RequestPtr &req, ThreadContext *tc, bool write)
         if (asiIsLittle(asi))
             panic("Little Endian ASIs not supported\n");
 
-        //XXX It's unclear from looking at the documentation how a no fault
-        // load differs from a regular one, other than what happens concerning
-        // nfo and e bits in the TTE
-//        if (asiIsNoFault(asi))
-//            panic("No Fault ASIs not supported\n");
-
         if (asiIsPartialStore(asi))
             panic("Partial Store ASIs not supported\n");