opcodes/
authorYufeng Zhang <yufeng.zhang@arm.com>
Thu, 14 Feb 2013 18:12:51 +0000 (18:12 +0000)
committerYufeng Zhang <yufeng.zhang@arm.com>
Thu, 14 Feb 2013 18:12:51 +0000 (18:12 +0000)
* aarch64-opc.c (aarch64_prfops): Change unnamed operation 'name'
fields to NULL.
(aarch64_print_operand): Adjust the printing for AARCH64_OPND_PRFOP.

gas/

* config/tc-aarch64.c (md_begin): Change to check if 'name' is
NULL.

gas/testsuite/

* gas/aarch64/system.s: Add tests.
* gas/aarch64/system.d: Update.

gas/ChangeLog
gas/config/tc-aarch64.c
gas/testsuite/ChangeLog
gas/testsuite/gas/aarch64/system.d
gas/testsuite/gas/aarch64/system.s
opcodes/ChangeLog
opcodes/aarch64-opc.c

index 48b5d6de5b5b6bee9cfff60531e201a5f8f16f9f..e415c66a511bbebe61958d0f31801eae9d698a9f 100644 (file)
@@ -1,3 +1,8 @@
+2013-02-14  Yufeng Zhang  <yufeng.zhang@arm.com>
+
+       * config/tc-aarch64.c (md_begin): Change to check if 'name' is
+       NULL.
+
 2013-02-09  Jürgen Urban  <JuergenUrban@gmx.de>
 
        * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
index f9b4cd08fc06f9f9372bda622c8e9c2f57fb266d..ce59705189b6ba30943ca38f5374126de7ee9600 100644 (file)
@@ -6867,9 +6867,8 @@ md_begin (void)
   for (i = 0; i < ARRAY_SIZE (aarch64_prfops); i++)
     {
       const char* name = aarch64_prfops[i].name;
-      /* Skip 0011x, 01xxx, 1011x and 11xxx - the unallocated hint encodings
-        as a 5-bit immediate #uimm5.  */
-      if ((i & 0xf) >= 6)
+      /* Skip the unallocated hint encodings.  */
+      if (name == NULL)
        continue;
       checked_hash_insert (aarch64_pldop_hsh, name,
                           (void *) (aarch64_prfops + i));
index d029bfe08c095baa360e403273cf308cacf4b34a..74cbc674d5825197da0c370917c1326c9d266f5a 100644 (file)
@@ -1,3 +1,8 @@
+2013-02-14  Yufeng Zhang  <yufeng.zhang@arm.com>
+
+       * gas/aarch64/system.s: Add tests.
+       * gas/aarch64/system.d: Update.
+
 2013-02-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 
        * gas/arm/archv6t2.s: Add strht and ldrht tests.
index 63e0b4c3c10fef34ba8337096a53210da6259c72..4fad8958a6956f9749a6810d73bacb74a4d7236a 100644 (file)
@@ -350,3 +350,21 @@ Disassembly of section \.text:
  4d8:  f8af6bff        prfm    #0x1f, \[sp,x15\]
  4dc:  f8be58ff        prfm    #0x1f, \[x7,w30,uxtw #3\]
  4e0:  f9800c7f        prfm    #0x1f, \[x3,#24\]
+ 4e4:  f9800c60        prfm    pldl1keep, \[x3,#24\]
+ 4e8:  f9800c61        prfm    pldl1strm, \[x3,#24\]
+ 4ec:  f9800c62        prfm    pldl2keep, \[x3,#24\]
+ 4f0:  f9800c63        prfm    pldl2strm, \[x3,#24\]
+ 4f4:  f9800c64        prfm    pldl3keep, \[x3,#24\]
+ 4f8:  f9800c65        prfm    pldl3strm, \[x3,#24\]
+ 4fc:  f9800c68        prfm    plil1keep, \[x3,#24\]
+ 500:  f9800c69        prfm    plil1strm, \[x3,#24\]
+ 504:  f9800c6a        prfm    plil2keep, \[x3,#24\]
+ 508:  f9800c6b        prfm    plil2strm, \[x3,#24\]
+ 50c:  f9800c6c        prfm    plil3keep, \[x3,#24\]
+ 510:  f9800c6d        prfm    plil3strm, \[x3,#24\]
+ 514:  f9800c70        prfm    pstl1keep, \[x3,#24\]
+ 518:  f9800c71        prfm    pstl1strm, \[x3,#24\]
+ 51c:  f9800c72        prfm    pstl2keep, \[x3,#24\]
+ 520:  f9800c73        prfm    pstl2strm, \[x3,#24\]
+ 524:  f9800c74        prfm    pstl3keep, \[x3,#24\]
+ 528:  f9800c75        prfm    pstl3strm, \[x3,#24\]
index 7fca5c2d48ecb13e0d7fa3dbeef255c7e8c2e409..234b900a3f9fd373335c4fd23dab757ffef91e07 100644 (file)
        .endm
 
        all_prefetchs   op=prfm, from=0, to=31
+
+       //
+       // PREFETCHS with named operation
+       //
+
+       .irp op, pld, pli, pst
+       .irp l, l1, l2, l3
+       .irp t, keep, strm
+       prfm    \op\l\t, [x3, #24]
+       .endr
+       .endr
+       .endr
index e709c4cad33126e7c1149c3526d692b96787c03f..6efdab07c8132504b665bfdbe1ea62787434f74c 100644 (file)
@@ -1,3 +1,9 @@
+2013-02-14  Yufeng Zhang  <yufeng.zhang@arm.com>
+
+       * aarch64-opc.c (aarch64_prfops): Change unnamed operation 'name'
+       fields to NULL.
+       (aarch64_print_operand): Adjust the printing for AARCH64_OPND_PRFOP.
+
 2013-02-13  Maciej W. Rozycki  <macro@codesourcery.com>
 
        * mips-dis.c (is_compressed_mode_p): Only match symbols from the
index 4bcb9eafbc15c402acbca8a67f7e18f5fda72027..b7b1b4a913a00e82787e4861e8eeb134b1a7d539 100644 (file)
@@ -346,32 +346,32 @@ const struct aarch64_name_value_pair aarch64_prfops[32] =
   { "pldl2strm", B(0, 2, 1) },
   { "pldl3keep", B(0, 3, 0) },
   { "pldl3strm", B(0, 3, 1) },
-  { "#0x06", 0x06 },
-  { "#0x07", 0x07 },
+  { NULL, 0x06 },
+  { NULL, 0x07 },
   { "plil1keep", B(1, 1, 0) },
   { "plil1strm", B(1, 1, 1) },
   { "plil2keep", B(1, 2, 0) },
   { "plil2strm", B(1, 2, 1) },
   { "plil3keep", B(1, 3, 0) },
   { "plil3strm", B(1, 3, 1) },
-  { "#0x0e", 0x0e },
-  { "#0x0f", 0x0f },
+  { NULL, 0x0e },
+  { NULL, 0x0f },
   { "pstl1keep", B(2, 1, 0) },
   { "pstl1strm", B(2, 1, 1) },
   { "pstl2keep", B(2, 2, 0) },
   { "pstl2strm", B(2, 2, 1) },
   { "pstl3keep", B(2, 3, 0) },
   { "pstl3strm", B(2, 3, 1) },
-  { "#0x16", 0x16 },
-  { "#0x17", 0x17 },
-  { "#0x18", 0x18 },
-  { "#0x19", 0x19 },
-  { "#0x1a", 0x1a },
-  { "#0x1b", 0x1b },
-  { "#0x1c", 0x1c },
-  { "#0x1d", 0x1d },
-  { "#0x1e", 0x1e },
-  { "#0x1f", 0x1f },
+  { NULL, 0x16 },
+  { NULL, 0x17 },
+  { NULL, 0x18 },
+  { NULL, 0x19 },
+  { NULL, 0x1a },
+  { NULL, 0x1b },
+  { NULL, 0x1c },
+  { NULL, 0x1d },
+  { NULL, 0x1e },
+  { NULL, 0x1f },
 };
 #undef B
 \f
@@ -2638,7 +2638,10 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
       break;
 
     case AARCH64_OPND_PRFOP:
-      snprintf (buf, size, "%s", opnd->prfop->name);
+      if (opnd->prfop->name != NULL)
+       snprintf (buf, size, "%s", opnd->prfop->name);
+      else
+       snprintf (buf, size, "#0x%02x", opnd->prfop->value);
       break;
 
     default: