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machxo2: Fix reversed interpretation of REG_SD config bits.
authorWilliam D. Jones <thor0505@comcast.net>
Mon, 1 Feb 2021 00:05:15 +0000 (19:05 -0500)
committerMarcelina Kościelnicka <mwk@0x04.net>
Tue, 23 Feb 2021 16:39:58 +0000 (17:39 +0100)
techlibs/machxo2/cells_sim.v patch | blob | history

diff --git a/techlibs/machxo2/cells_sim.v b/techlibs/machxo2/cells_sim.v
index 5f985d4773849b5204e918061bbb213c3555dd26..e046d0c8787c6badf9bbcaf91bb4d0fe1072cddf 100644 (file)
--- a/techlibs/machxo2/cells_sim.v
+++ b/techlibs/machxo2/cells_sim.v
@@ -146,8 +146,8 @@ module FACADE_SLICE #(
 
        /* Reg can be fed either by M, or DI inputs; DI inputs muxes OFX and F
        outputs (in other words, feeds back into FACADE_SLICE). */
-       wire di0 = (REG0_SD == "1") ? M0 : DI0;
-       wire di1 = (REG1_SD == "1") ? M1 : DI1;
+       wire di0 = (REG0_SD == "1") ? DI0 : M0;
+       wire di1 = (REG1_SD == "1") ? DI1 : M1;
 
        FACADE_FF#(.GSR(GSR), .CEMUX(CEMUX), .CLKMUX(CLKMUX), .LSRMUX(LSRMUX),
                .LSRONMUX(LSRONMUX), .SRMODE(SRMODE), .REGSET(REG0_REGSET),