(aarch64_crypto_pmullv2di): Change type attribute to crypto_pmull.
* config/aarch64/thunderx2t99.md (thunderx2t99_pmull): New
reservation.
* config/arm/cortex-a57.md (cortex_a57_neon_type): Add crypto_pmull to
attribute type list for neon_multiply.
* config/arm/crypto.md (crypto_vmullp64): Change type to crypto_pmull.
* config/arm/types.md (crypto_pmull): Add.
* config/arm/xgene1.md (xgene1_neon_pmull): Add crypto_pmull to
attribute type list.
Co-Authored-By: Naveen H.S <Naveen.Hurugalawadi@cavium.com>
From-SVN: r249433
+2017-06-21 Julian Brown <julian@codesourcery.com>
+ Naveen H.S <Naveen.Hurugalawadi@cavium.com>
+
+ * config/aarch64/aarch64-simd.md (aarch64_crypto_pmulldi)
+ (aarch64_crypto_pmullv2di): Change type attribute to crypto_pmull.
+ * config/aarch64/thunderx2t99.md (thunderx2t99_pmull): New
+ reservation.
+ * config/arm/cortex-a57.md (cortex_a57_neon_type): Add crypto_pmull to
+ attribute type list for neon_multiply.
+ * config/arm/crypto.md (crypto_vmullp64): Change type to crypto_pmull.
+ * config/arm/types.md (crypto_pmull): Add.
+ * config/arm/xgene1.md (xgene1_neon_pmull): Add crypto_pmull to
+ attribute type list.
+
2017-06-20 Andreas Tobler <andreast@gcc.gnu.org>
* config.gcc (armv6*-*-freebsd*): Change the target_cpu_cname to
UNSPEC_PMULL))]
"TARGET_SIMD && TARGET_CRYPTO"
"pmull\\t%0.1q, %1.1d, %2.1d"
- [(set_attr "type" "neon_mul_d_long")]
+ [(set_attr "type" "crypto_pmull")]
)
(define_insn "aarch64_crypto_pmullv2di"
UNSPEC_PMULL2))]
"TARGET_SIMD && TARGET_CRYPTO"
"pmull2\\t%0.1q, %1.2d, %2.2d"
- [(set_attr "type" "neon_mul_d_long")]
+ [(set_attr "type" "crypto_pmull")]
)
(and (eq_attr "tune" "thunderx2t99")
(eq_attr "type" "crc"))
"thunderx2t99_i1")
+
+;; PMULL extension.
+
+(define_insn_reservation "thunderx2t99_pmull" 5
+ (and (eq_attr "tune" "thunderx2t99")
+ (eq_attr "type" "crypto_pmull"))
+ "thunderx2t99_f1")
neon_sat_mul_b_long, neon_sat_mul_h_long,\
neon_sat_mul_s_long, neon_sat_mul_h_scalar_q,\
neon_sat_mul_s_scalar_q, neon_sat_mul_h_scalar_long,\
- neon_sat_mul_s_scalar_long, neon_mla_b_q,\
+ neon_sat_mul_s_scalar_long, crypto_pmull, neon_mla_b_q,\
neon_mla_h_q, neon_mla_s_q, neon_mla_b_long,\
neon_mla_h_long, neon_mla_s_long,\
neon_mla_h_scalar_q, neon_mla_s_scalar_q,\
neon_mul_h_scalar_long, neon_mul_s_scalar_long,\
neon_sat_mul_b_long, neon_sat_mul_h_long,\
neon_sat_mul_s_long, neon_sat_mul_h_scalar_long,\
- neon_sat_mul_s_scalar_long")
+ neon_sat_mul_s_scalar_long, crypto_pmull")
(const_string "neon_multiply")
(eq_attr "type" "neon_mul_b_q, neon_mul_h_q, neon_mul_s_q,\
neon_mul_h_scalar_q, neon_mul_s_scalar_q,\
UNSPEC_VMULLP64))]
"TARGET_CRYPTO"
"vmull.p64\\t%q0, %P1, %P2"
- [(set_attr "type" "neon_mul_d_long")]
+ [(set_attr "type" "crypto_pmull")]
)
(define_insn "crypto_<crypto_pattern>"
neon_sat_mul_s_scalar, neon_sat_mul_s_scalar_q,\
neon_sat_mul_b_long, neon_sat_mul_h_long,\
neon_sat_mul_s_long, neon_sat_mul_h_scalar_long,\
- neon_sat_mul_s_scalar_long")
+ neon_sat_mul_s_scalar_long, crypto_pmull")
(const_string "neon_multiply")
(eq_attr "type" "neon_mla_b, neon_mla_h, neon_mla_s,\
; crypto_sha1_slow
; crypto_sha256_fast
; crypto_sha256_slow
+; crypto_pmull
;
; The classification below is for coprocessor instructions
;
crypto_sha1_slow,\
crypto_sha256_fast,\
crypto_sha256_slow,\
+ crypto_pmull,\
coproc"
(const_string "untyped"))
(define_insn_reservation "xgene1_neon_pmull" 5
(and (eq_attr "tune" "xgene1")
(eq_attr "type" "neon_mul_d_long,\
- "))
+ crypto_pmull,\
+ "))
"xgene1_decode2op")