+2019-11-16 Segher Boessenkool <segher@kernel.crashing.org>
+
+ * config/rs6000/rs6000.md (cceq_ior_compare): Rename to...
+ (@cceq_ior_compare_<mode> for GPR): ... this. Allow GPR instead of
+ just SI.
+ (cceq_rev_compare): Rename to...
+ (@cceq_rev_compare_<mode> for GPR): ... this. Allow GPR instead of
+ just SI.
+ (define_split for <bd>tf_<mode>): Add SImode first argument to
+ gen_cceq_ior_compare.
+
2019-11-16 Segher Boessenkool <segher@kernel.crashing.org>
* common/config/powerpcspe: Delete.
; which are generated by the branch logic.
; Prefer destructive operations where BT = BB (for crXX BT,BA,BB)
-(define_insn "cceq_ior_compare"
+(define_insn "@cceq_ior_compare_<mode>"
[(set (match_operand:CCEQ 0 "cc_reg_operand" "=y,?y")
- (compare:CCEQ (match_operator:SI 1 "boolean_operator"
- [(match_operator:SI 2
+ (compare:CCEQ (match_operator:GPR 1 "boolean_operator"
+ [(match_operator:GPR 2
"branch_positive_comparison_operator"
[(match_operand 3
"cc_reg_operand" "y,y")
(const_int 0)])
- (match_operator:SI 4
+ (match_operator:GPR 4
"branch_positive_comparison_operator"
[(match_operand 5
"cc_reg_operand" "0,y")
[(set_attr "type" "cr_logical")
(set_attr "cr_logical_3op" "no,yes")])
-(define_insn "*cceq_rev_compare"
+(define_insn "@cceq_rev_compare_<mode>"
[(set (match_operand:CCEQ 0 "cc_reg_operand" "=y,?y")
- (compare:CCEQ (match_operator:SI 1
+ (compare:CCEQ (match_operator:GPR 1
"branch_positive_comparison_operator"
[(match_operand 2
"cc_reg_operand" "0,y")
rtx andexpr = gen_rtx_AND (SImode, ctrcmpcc, cccmp);
if (ispos)
- emit_insn (gen_cceq_ior_compare (operands[9], andexpr, ctrcmpcc,
+ emit_insn (gen_cceq_ior_compare (SImode, operands[9], andexpr, ctrcmpcc,
operands[8], cccmp, ccin));
else
emit_insn (gen_cceq_ior_compare_complement (operands[9], andexpr, ctrcmpcc,