static int
xstormy16_address_cost (rtx x, bool speed ATTRIBUTE_UNUSED)
{
- return (GET_CODE (x) == CONST_INT ? 2
+ return (CONST_INT_P (x) ? 2
: GET_CODE (x) == PLUS ? 7
: 5);
}
code = GET_CODE (op);
- if (GET_CODE (XEXP (op, 0)) != REG)
+ if (! REG_P (XEXP (op, 0)))
{
code = swap_condition (code);
operands = "%3,%2";
{
int regnum;
- gcc_assert (GET_CODE (XEXP (op, 0)) == REG);
+ gcc_assert (REG_P (XEXP (op, 0)));
regnum = REGNO (XEXP (op, 0));
sprintf (prevop, "or %s,%s", reg_names[regnum], reg_names[regnum+1]);
enum reg_class
xstormy16_secondary_reload_class (enum reg_class rclass,
- enum machine_mode mode,
+ enum machine_mode mode ATTRIBUTE_UNUSED,
rtx x)
{
/* This chip has the interesting property that only the first eight
registers can be moved to/from memory. */
- if ((GET_CODE (x) == MEM
- || ((GET_CODE (x) == SUBREG || GET_CODE (x) == REG)
+ if ((MEM_P (x)
+ || ((GET_CODE (x) == SUBREG || REG_P (x))
&& (true_regnum (x) == -1
|| true_regnum (x) >= FIRST_PSEUDO_REGISTER)))
&& ! reg_class_subset_p (rclass, EIGHT_REGS))
enum reg_class
xstormy16_preferred_reload_class (rtx x, enum reg_class rclass)
{
- if (rclass == GENERAL_REGS
- && GET_CODE (x) == MEM)
+ if (rclass == GENERAL_REGS && MEM_P (x))
return EIGHT_REGS;
return rclass;
{
if (GET_CODE (x) == CONST)
x = XEXP (x, 0);
- if (GET_CODE (x) == PLUS
- && GET_CODE (XEXP (x, 1)) == CONST_INT)
+ if (GET_CODE (x) == PLUS && CONST_INT_P (XEXP (x, 1)))
x = XEXP (x, 0);
if (GET_CODE (x) == SYMBOL_REF)
return (SYMBOL_REF_FLAGS (x) & SYMBOL_FLAG_XSTORMY16_BELOW100) != 0;
- if (GET_CODE (x) == CONST_INT)
+ if (CONST_INT_P (x))
{
HOST_WIDE_INT i = INTVAL (x);
+
if ((i >= 0x0000 && i <= 0x00ff)
|| (i >= 0x7f00 && i <= 0x7fff))
return 1;
int
xstormy16_splittable_below100_operand (rtx x, enum machine_mode mode)
{
- if (GET_CODE (x) == MEM && MEM_VOLATILE_P (x))
+ if (MEM_P (x) && MEM_VOLATILE_P (x))
return 0;
return xstormy16_below100_operand (x, mode);
}
return;
}
- if (GET_CODE (in) != REG)
+ if (! REG_P (in))
in = copy_to_mode_reg (QImode, in);
- if (GET_CODE (val) != REG
- && GET_CODE (val) != CONST_INT)
+
+ if (! REG_P (val) && ! CONST_INT_P (val))
val = copy_to_mode_reg (QImode, val);
- if (GET_CODE (out) != REG)
+
+ if (! REG_P (out))
out = gen_reg_rtx (QImode);
in = simplify_gen_subreg (HImode, in, QImode, 0);
outsub = simplify_gen_subreg (HImode, out, QImode, 0);
- if (GET_CODE (val) != CONST_INT)
+
+ if (! CONST_INT_P (val))
val = simplify_gen_subreg (HImode, val, QImode, 0);
emit_insn (gen_iorhi3 (outsub, in, val));
return;
}
- if (GET_CODE (in) != REG)
+ if (! REG_P (in))
in = copy_to_mode_reg (QImode, in);
- if (GET_CODE (val) != REG
- && GET_CODE (val) != CONST_INT)
+
+ if (! REG_P (val) && ! CONST_INT_P (val))
val = copy_to_mode_reg (QImode, val);
- if (GET_CODE (out) != REG)
+
+ if (! REG_P (out))
out = gen_reg_rtx (QImode);
in = simplify_gen_subreg (HImode, in, QImode, 0);
outsub = simplify_gen_subreg (HImode, out, QImode, 0);
- if (GET_CODE (val) != CONST_INT)
+
+ if (! CONST_INT_P (val))
val = simplify_gen_subreg (HImode, val, QImode, 0);
emit_insn (gen_andhi3 (outsub, in, val));
}
#define LEGITIMATE_ADDRESS_INTEGER_P(X, OFFSET) \
- (GET_CODE (X) == CONST_INT \
+ (CONST_INT_P (X) \
&& (unsigned HOST_WIDE_INT) (INTVAL (X) + (OFFSET) + 2048) < 4096)
#define LEGITIMATE_ADDRESS_CONST_INT_P(X, OFFSET) \
- (GET_CODE (X) == CONST_INT \
+ (CONST_INT_P (X) \
&& INTVAL (X) + (OFFSET) >= 0 \
&& INTVAL (X) + (OFFSET) < 0x8000 \
&& (INTVAL (X) + (OFFSET) < 0x100 || INTVAL (X) + (OFFSET) >= 0x7F00))
rtx x, bool strict)
{
if (LEGITIMATE_ADDRESS_CONST_INT_P (x, 0))
- return 1;
+ return true;
if (GET_CODE (x) == PLUS
&& LEGITIMATE_ADDRESS_INTEGER_P (XEXP (x, 1), 0))
{
x = XEXP (x, 0);
/* PR 31232: Do not allow INT+INT as an address. */
- if (GET_CODE (x) == CONST_INT)
- return 0;
+ if (CONST_INT_P (x))
+ return false;
}
- if ((GET_CODE (x) == PRE_MODIFY
- && GET_CODE (XEXP (XEXP (x, 1), 1)) == CONST_INT)
+ if ((GET_CODE (x) == PRE_MODIFY && CONST_INT_P (XEXP (XEXP (x, 1), 1)))
|| GET_CODE (x) == POST_INC
|| GET_CODE (x) == PRE_DEC)
x = XEXP (x, 0);
- if (GET_CODE (x) == REG && REGNO_OK_FOR_BASE_P (REGNO (x))
+ if (REG_P (x)
+ && REGNO_OK_FOR_BASE_P (REGNO (x))
&& (! strict || REGNO (x) < FIRST_PSEUDO_REGISTER))
- return 1;
+ return true;
if (xstormy16_below100_symbol (x, mode))
- return 1;
+ return true;
- return 0;
+ return false;
}
/* Return nonzero if memory address X (an RTX) can have different
{
/* 'Q' is for pushes. */
case 'Q':
- return (GET_CODE (x) == MEM
+ return (MEM_P (x)
&& GET_CODE (XEXP (x, 0)) == POST_INC
&& XEXP (XEXP (x, 0), 0) == stack_pointer_rtx);
/* 'R' is for pops. */
case 'R':
- return (GET_CODE (x) == MEM
+ return (MEM_P (x)
&& GET_CODE (XEXP (x, 0)) == PRE_DEC
&& XEXP (XEXP (x, 0), 0) == stack_pointer_rtx);
/* 'S' is for immediate memory addresses. */
case 'S':
- return (GET_CODE (x) == MEM
- && GET_CODE (XEXP (x, 0)) == CONST_INT
+ return (MEM_P (x)
+ && CONST_INT_P (XEXP (x, 0))
&& xstormy16_legitimate_address_p (VOIDmode, XEXP (x, 0), 0));
/* 'T' is for Rx. */
/* 'U' is for CONST_INT values not between 2 and 15 inclusive,
for allocating a scratch register for 32-bit shifts. */
case 'U':
- return (GET_CODE (x) == CONST_INT
- && (INTVAL (x) < 2 || INTVAL (x) > 15));
+ return (CONST_INT_P (x) && (! IN_RANGE (INTVAL (x), 2, 15)));
/* 'Z' is for CONST_INT value zero. This is for adding zero to
a register in addhi3, which would otherwise require a carry. */
case 'Z':
- return (GET_CODE (x) == CONST_INT
- && (INTVAL (x) == 0));
+ return (CONST_INT_P (x) && (INTVAL (x) == 0));
case 'W':
return xstormy16_below100_operand (x, GET_MODE (x));
&& general_operand (src, mode));
/* This case is not supported below, and shouldn't be generated. */
- gcc_assert (GET_CODE (dest) != MEM || GET_CODE (src) != MEM);
+ gcc_assert (! MEM_P (dest) || ! MEM_P (src));
/* This case is very very bad after reload, so trap it now. */
gcc_assert (GET_CODE (dest) != SUBREG && GET_CODE (src) != SUBREG);
must be reversed. */
direction = 1;
- if (GET_CODE (dest) == MEM)
+ if (MEM_P (dest))
{
mem_operand = XEXP (dest, 0);
dest_modifies = side_effects_p (mem_operand);
MEM_VOLATILE_P (dest) = 0;
}
}
- else if (GET_CODE (src) == MEM)
+ else if (MEM_P (src))
{
mem_operand = XEXP (src, 0);
src_modifies = side_effects_p (mem_operand);
if (mem_operand == NULL_RTX)
{
- if (GET_CODE (src) == REG
- && GET_CODE (dest) == REG
+ if (REG_P (src)
+ && REG_P (dest)
&& reg_overlap_mentioned_p (dest, src)
&& REGNO (dest) > REGNO (src))
direction = -1;
|| (GET_CODE (mem_operand) == PLUS
&& GET_CODE (XEXP (mem_operand, 0)) == PRE_DEC))
direction = -1;
- else if (GET_CODE (src) == MEM
- && reg_overlap_mentioned_p (dest, src))
+ else if (MEM_P (src) && reg_overlap_mentioned_p (dest, src))
{
int regno;
- gcc_assert (GET_CODE (dest) == REG);
+ gcc_assert (REG_P (dest));
regno = REGNO (dest);
gcc_assert (refers_to_regno_p (regno, regno + num_words,
void
xstormy16_expand_move (enum machine_mode mode, rtx dest, rtx src)
{
- if ((GET_CODE (dest) == MEM) && (GET_CODE (XEXP (dest, 0)) == PRE_MODIFY))
+ if (MEM_P (dest) && (GET_CODE (XEXP (dest, 0)) == PRE_MODIFY))
{
rtx pmv = XEXP (dest, 0);
rtx dest_reg = XEXP (pmv, 0);
dest = gen_rtx_MEM (mode, dest_reg);
emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, set, clobber)));
}
- else if ((GET_CODE (src) == MEM) && (GET_CODE (XEXP (src, 0)) == PRE_MODIFY))
+ else if (MEM_P (src) && (GET_CODE (XEXP (src, 0)) == PRE_MODIFY))
{
rtx pmv = XEXP (src, 0);
rtx src_reg = XEXP (pmv, 0);
/* There are only limited immediate-to-memory move instructions. */
if (! reload_in_progress
&& ! reload_completed
- && GET_CODE (dest) == MEM
- && (GET_CODE (XEXP (dest, 0)) != CONST_INT
+ && MEM_P (dest)
+ && (! CONST_INT_P (XEXP (dest, 0))
|| ! xstormy16_legitimate_address_p (mode, XEXP (dest, 0), 0))
&& ! xstormy16_below100_operand (dest, mode)
- && GET_CODE (src) != REG
+ && ! REG_P (src)
&& GET_CODE (src) != SUBREG)
src = copy_to_mode_reg (mode, src);
xstormy16_expand_epilogue (void)
{
struct xstormy16_stack_layout layout;
- rtx mem_pop_rtx, insn;
+ rtx mem_pop_rtx;
int regno;
const int ifun = xstormy16_interrupt_function_p ();
if (targetm.calls.must_pass_in_stack (mode, type)
|| cum + XSTORMY16_WORD_SIZE (type, mode) > NUM_ARGUMENT_REGISTERS)
return NULL_RTX;
- return gen_rtx_REG (mode, cum + 2);
+ return gen_rtx_REG (mode, cum + FIRST_ARGUMENT_REGISTER);
}
/* Build the va_list type.
rtx symbol;
if (mem != NULL_RTX
- && GET_CODE (mem) == MEM
+ && MEM_P (mem)
&& GET_CODE (symbol = XEXP (mem, 0)) == SYMBOL_REF
&& SYMBOL_REF_FLAGS (symbol) & SYMBOL_FLAG_XSTORMY16_BELOW100)
{
int pre_dec, post_inc;
/* There are a few easy cases. */
- if (GET_CODE (address) == CONST_INT)
+ if (CONST_INT_P (address))
{
fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (address) & 0xFFFF);
return;
}
- if (CONSTANT_P (address) || GET_CODE (address) == CODE_LABEL)
+ if (CONSTANT_P (address) || LABEL_P (address))
{
output_addr_const (file, address);
return;
(plus:HI (pre_dec:HI (reg:HI ...)) (const_int ...)). */
if (GET_CODE (address) == PLUS)
{
- gcc_assert (GET_CODE (XEXP (address, 1)) == CONST_INT);
+ gcc_assert (CONST_INT_P (XEXP (address, 1)));
offset = INTVAL (XEXP (address, 1));
address = XEXP (address, 0);
}
if (pre_dec || post_inc)
address = XEXP (address, 0);
- gcc_assert (GET_CODE (address) == REG);
+ gcc_assert (REG_P (address));
fputc ('(', file);
if (pre_dec)
HOST_WIDE_INT xx = 1;
HOST_WIDE_INT l;
- if (GET_CODE (x) == CONST_INT)
+ if (CONST_INT_P (x))
xx = INTVAL (x);
else
output_operand_lossage ("'B' operand is not constant");
/* Print the symbol without a surrounding @fptr(). */
if (GET_CODE (x) == SYMBOL_REF)
assemble_name (file, XSTR (x, 0));
- else if (GET_CODE (x) == LABEL_REF)
+ else if (LABEL_P (x))
output_asm_label (x);
else
xstormy16_print_operand_address (file, x);
{
HOST_WIDE_INT xx = 0;
- if (GET_CODE (x) == CONST_INT)
+ if (CONST_INT_P (x))
xx = INTVAL (x);
else
output_operand_lossage ("'o' operand is not constant");
HOST_WIDE_INT xx = 1;
HOST_WIDE_INT l;
- if (GET_CODE (x) == CONST_INT)
+ if (CONST_INT_P (x))
xx = INTVAL (x);
else
output_operand_lossage ("'B' operand is not constant");
}
\f
/* Expander for the `call' patterns.
- INDEX is the index of the switch statement.
- LOWER_BOUND is a CONST_INT that is the value of INDEX corresponding
- to the first table entry.
- RANGE is the number of table entries.
- TABLE is an ADDR_VEC that is the jump table.
- DEFAULT_LABEL is the address to branch to if INDEX is outside the
- range LOWER_BOUND to LOWER_BOUND + RANGE - 1. */
+ RETVAL is the RTL for the return register or NULL for void functions.
+ DEST is the function to call, expressed as a MEM.
+ COUNTER is ignored. */
void
xstormy16_expand_call (rtx retval, rtx dest, rtx counter)
rtx call, temp;
enum machine_mode mode;
- gcc_assert (GET_CODE (dest) == MEM);
+ gcc_assert (MEM_P (dest));
dest = XEXP (dest, 0);
- if (! CONSTANT_P (dest)
- && GET_CODE (dest) != REG)
+ if (! CONSTANT_P (dest) && ! REG_P (dest))
dest = force_reg (Pmode, dest);
if (retval == NULL)
{
case PLUS:
if (firstloop
- && GET_CODE (w_src1) == CONST_INT && INTVAL (w_src1) == 0)
+ && CONST_INT_P (w_src1)
+ && INTVAL (w_src1) == 0)
continue;
if (firstloop)
}
else if (firstloop
&& code != COMPARE
- && GET_CODE (w_src1) == CONST_INT && INTVAL (w_src1) == 0)
+ && CONST_INT_P (w_src1)
+ && INTVAL (w_src1) == 0)
continue;
else if (firstloop)
insn = gen_subchi4 (w_dest, w_src0, w_src1);
case IOR:
case XOR:
case AND:
- if (GET_CODE (w_src1) == CONST_INT
+ if (CONST_INT_P (w_src1)
&& INTVAL (w_src1) == -(code == AND))
continue;
const char *r0, *r1, *rt;
static char r[64];
- gcc_assert (GET_CODE (size_r) == CONST_INT
- && GET_CODE (x) == REG && mode == SImode);
+ gcc_assert (CONST_INT_P (size_r)
+ && REG_P (x)
+ && mode == SImode);
+
size = INTVAL (size_r) & (GET_MODE_BITSIZE (mode) - 1);
if (size == 0)
}
reg = XEXP (cond, 0);
- if (GET_CODE (reg) != REG)
+ if (! REG_P (reg))
return;
regno = REGNO (reg);
if (XEXP (cond, 1) != const0_rtx)
projects / gcc.git / commitdiff