freedreno: small bit of cleanup about max rendertargets

We hard-coded 4 or 8 as the max in various places.  Switch it all to a
define since the limit will go up with a4xx (and maybe even again in the
future?)

Signed-off-by: Rob Clark <robclark@freedesktop.org>

diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_blend.h b/src/gallium/drivers/freedreno/a3xx/fd3_blend.h
index 0267001b0b9c793560bbc33e660b0bc8c8437e92..142df7c300f54c30be0ad03f1983c4fa1c9cc329 100644 (file)
--- a/src/gallium/drivers/freedreno/a3xx/fd3_blend.h
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_blend.h
@@ -32,6 +32,8 @@
 #include "pipe/p_state.h"
 #include "pipe/p_context.h"
 
+#include "freedreno_util.h"
+
 struct fd3_blend_stateobj {
        struct pipe_blend_state base;
        struct {
@@ -42,7 +44,7 @@ struct fd3_blend_stateobj {
                /* Blend control bits for alpha channel */
                uint32_t blend_control_alpha;
                uint32_t control;
-       } rb_mrt[4];
+       } rb_mrt[A3XX_MAX_RENDER_TARGETS];
 };
 
 static inline struct fd3_blend_stateobj *

diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_draw.c b/src/gallium/drivers/freedreno/a3xx/fd3_draw.c
index fc30d4842ba1ad94c8429aa77ff34da3411811ba..43550ae6a220e8f02d36f4fcc6e0b20391a0b4b9 100644 (file)
--- a/src/gallium/drivers/freedreno/a3xx/fd3_draw.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_draw.c
@@ -324,7 +324,7 @@ fd3_clear(struct fd_context *ctx, unsigned buffers,
                                A3XX_RB_STENCIL_CONTROL_ZFAIL_BF(STENCIL_KEEP));
        }
 
-       for (i = 0; i < 4; i++) {
+       for (i = 0; i < A3XX_MAX_RENDER_TARGETS; i++) {
                OUT_PKT0(ring, REG_A3XX_RB_MRT_CONTROL(i), 1);
                OUT_RING(ring, A3XX_RB_MRT_CONTROL_ROP_CODE(ROP_COPY) |
                                A3XX_RB_MRT_CONTROL_DITHER_MODE(DITHER_ALWAYS) |

diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c b/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
index 7d3975761dde6b39146f79573c73eeaf0ab76794..4689085e51602a233a92a47469f1b05b2e819751 100644 (file)
--- a/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
@@ -57,7 +57,7 @@ emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs,
                tile_mode = LINEAR;
        }
 
-       for (i = 0; i < 4; i++) {
+       for (i = 0; i < A3XX_MAX_RENDER_TARGETS; i++) {
                enum pipe_format pformat = 0;
                enum a3xx_color_fmt format = 0;
                enum a3xx_color_swap swap = WZYX;

diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_program.c b/src/gallium/drivers/freedreno/a3xx/fd3_program.c
index 7cd4885ab4f493bb1477ec36e5be84dd5015bccf..e98c6b5cff4c7a4a2d902851f17b3ab14ed0c516 100644 (file)
--- a/src/gallium/drivers/freedreno/a3xx/fd3_program.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_program.c
@@ -136,6 +136,8 @@ fd3_program_emit(struct fd_ringbuffer *ring, struct fd3_emit *emit,
        int constmode;
        int i, j, k;
 
+       debug_assert(nr <= ARRAY_SIZE(color_regid));
+
        vp = fd3_emit_get_vp(emit);
 
        if (emit->key.binning_pass) {
@@ -207,7 +209,7 @@ fd3_program_emit(struct fd_ringbuffer *ring, struct fd3_emit *emit,
                        unsigned idx = sem2idx(sem);
                        if (sem2name(sem) != TGSI_SEMANTIC_COLOR)
                                continue;
-                       assert(idx < 4);
+                       debug_assert(idx < ARRAY_SIZE(color_regid));
                        color_regid[idx] = fp->outputs[i].regid;
                }
        }

diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_blend.h b/src/gallium/drivers/freedreno/a4xx/fd4_blend.h
index 821b3c82832c06bb6c13e1ed09f093e03a4d4a3d..7620d00a625bf092119312f0c212e57549f7d6ed 100644 (file)
--- a/src/gallium/drivers/freedreno/a4xx/fd4_blend.h
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_blend.h
@@ -32,13 +32,15 @@
 #include "pipe/p_state.h"
 #include "pipe/p_context.h"
 
+#include "freedreno_util.h"
+
 struct fd4_blend_stateobj {
        struct pipe_blend_state base;
        struct {
                uint32_t control;
                uint32_t buf_info;
                uint32_t blend_control;
-       } rb_mrt[8];
+       } rb_mrt[A4XX_MAX_RENDER_TARGETS];
        uint32_t rb_fs_output;
 };
 

diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_draw.c b/src/gallium/drivers/freedreno/a4xx/fd4_draw.c
index ff1dfdc392fb27cbf4aabfe7b4d1f4c09abd9679..154154190dbcee24493d38bdb65e34823a9486bb 100644 (file)
--- a/src/gallium/drivers/freedreno/a4xx/fd4_draw.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_draw.c
@@ -265,7 +265,7 @@ fd4_clear(struct fd_context *ctx, unsigned buffers,
                ce = 0x0;
        }
 
-       for (i = 0; i < 8; i++) {
+       for (i = 0; i < A4XX_MAX_RENDER_TARGETS; i++) {
                OUT_PKT0(ring, REG_A4XX_RB_MRT_CONTROL(i), 1);
                OUT_RING(ring, A4XX_RB_MRT_CONTROL_FASTCLEAR |
                                A4XX_RB_MRT_CONTROL_B11 |

diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
index 62a1e9ee95562754a1ea2f9b5f2d537a5074a7da..df96601c747c0c19de3d886d8cf34d794863d62f 100644 (file)
--- a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
@@ -487,7 +487,7 @@ fd4_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
                struct fd4_blend_stateobj *blend = fd4_blend_stateobj(ctx->blend);
                uint32_t i;
 
-               for (i = 0; i < 8; i++) {
+               for (i = 0; i < A4XX_MAX_RENDER_TARGETS; i++) {
                        OUT_PKT0(ring, REG_A4XX_RB_MRT_CONTROL(i), 1);
                        OUT_RING(ring, blend->rb_mrt[i].control);
 

diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c b/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
index 9a9050620714f8d834f0b153cbcac599ea74a18e..976255f587921da6110bc2b0817784e27fc0b8b3 100644 (file)
--- a/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
@@ -63,7 +63,7 @@ emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs,
                tile_mode = TILE4_LINEAR;
        }
 
-       for (i = 0; i < 8; i++) {
+       for (i = 0; i < A4XX_MAX_RENDER_TARGETS; i++) {
                enum a4xx_color_fmt format = 0;
                enum a3xx_color_swap swap = WZYX;
                struct fd_resource *rsc = NULL;

diff --git a/src/gallium/drivers/freedreno/freedreno_context.h b/src/gallium/drivers/freedreno/freedreno_context.h
index cc585af1b3f55ff58912a1e03ff1ff1284f114c1..509a90fdf2395cba7d5362613f5466c5302aa6e6 100644 (file)
--- a/src/gallium/drivers/freedreno/freedreno_context.h
+++ b/src/gallium/drivers/freedreno/freedreno_context.h
@@ -193,7 +193,7 @@ struct fd_context {
        struct fd_program_stateobj solid_prog; // TODO move to screen?
 
        /* shaders used by mem->gmem blits: */
-       struct fd_program_stateobj blit_prog[8]; // TODO move to screen?
+       struct fd_program_stateobj blit_prog[MAX_RENDER_TARGETS]; // TODO move to screen?
        struct fd_program_stateobj blit_z, blit_zs;
 
        /* do we need to mem2gmem before rendering.  We don't, if for example,

diff --git a/src/gallium/drivers/freedreno/freedreno_gmem.c b/src/gallium/drivers/freedreno/freedreno_gmem.c
index c105378ec4e67e3ba23bb8e5eaa4fd50acb9caf6..648db9baee5f6b180b5dc9455ba0bd2142a14acc 100644 (file)
--- a/src/gallium/drivers/freedreno/freedreno_gmem.c
+++ b/src/gallium/drivers/freedreno/freedreno_gmem.c
@@ -82,7 +82,7 @@ total_size(uint8_t cbuf_cpp[], uint8_t zsbuf_cpp[2],
 {
        uint32_t total = 0, i;
 
-       for (i = 0; i < 4; i++) {
+       for (i = 0; i < MAX_RENDER_TARGETS; i++) {
                if (cbuf_cpp[i]) {
                        gmem->cbuf_base[i] = align(total, 0x4000);
                        total = gmem->cbuf_base[i] + cbuf_cpp[i] * bin_w * bin_h;
@@ -113,7 +113,7 @@ calculate_tiles(struct fd_context *ctx)
        uint32_t nbins_x = 1, nbins_y = 1;
        uint32_t bin_w, bin_h;
        uint32_t max_width = bin_width(ctx);
-       uint8_t cbuf_cpp[4] = {0}, zsbuf_cpp[2] = {0};
+       uint8_t cbuf_cpp[MAX_RENDER_TARGETS] = {0}, zsbuf_cpp[2] = {0};
        uint32_t i, j, t, xoff, yoff;
        uint32_t tpp_x, tpp_y;
        bool has_zs = !!(ctx->resolve & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL));
@@ -162,12 +162,17 @@ calculate_tiles(struct fd_context *ctx)
                bin_w = align(width / nbins_x, 32);
        }
 
+       if (fd_mesa_debug & FD_DBG_MSGS) {
+               debug_printf("binning input: cbuf cpp:");
+               for (i = 0; i < pfb->nr_cbufs; i++)
+                       debug_printf(" %d", cbuf_cpp[i]);
+               debug_printf(", zsbuf cpp: %d; %dx%d\n",
+                               zsbuf_cpp[0], width, height);
+       }
+
        /* then find a bin width/height that satisfies the memory
         * constraints:
         */
-       DBG("binning input: cbuf cpp: %d %d %d %d, zsbuf cpp: %d; %dx%d",
-               cbuf_cpp[0], cbuf_cpp[1], cbuf_cpp[2], cbuf_cpp[3], zsbuf_cpp[0],
-               width, height);
        while (total_size(cbuf_cpp, zsbuf_cpp, bin_w, bin_h, gmem) > gmem_size) {
                if (bin_w > bin_h) {
                        nbins_x++;

diff --git a/src/gallium/drivers/freedreno/freedreno_gmem.h b/src/gallium/drivers/freedreno/freedreno_gmem.h
index 5867235db90c4f2265994c696fcf27df015269de..38b557eb077bf7da46308663a42cfabcd5e8646c 100644 (file)
--- a/src/gallium/drivers/freedreno/freedreno_gmem.h
+++ b/src/gallium/drivers/freedreno/freedreno_gmem.h
@@ -31,6 +31,8 @@
 
 #include "pipe/p_context.h"
 
+#include "freedreno_util.h"
+
 /* per-pipe configuration for hw binning: */
 struct fd_vsc_pipe {
        struct fd_bo *bo;
@@ -47,9 +49,9 @@ struct fd_tile {
 
 struct fd_gmem_stateobj {
        struct pipe_scissor_state scissor;
-       uint32_t cbuf_base[4];
+       uint32_t cbuf_base[MAX_RENDER_TARGETS];
        uint32_t zsbuf_base[2];
-       uint8_t cbuf_cpp[4];
+       uint8_t cbuf_cpp[MAX_RENDER_TARGETS];
        uint8_t zsbuf_cpp[2];
        uint16_t bin_h, nbins_y;
        uint16_t bin_w, nbins_x;

diff --git a/src/gallium/drivers/freedreno/freedreno_program.c b/src/gallium/drivers/freedreno/freedreno_program.c
index 5e344e691467fe3e6b504b7919621f8d24d4454d..e6a647852a3b99e0714e7ee9959da9588a1d6310 100644 (file)
--- a/src/gallium/drivers/freedreno/freedreno_program.c
+++ b/src/gallium/drivers/freedreno/freedreno_program.c
@@ -96,7 +96,11 @@ fd_prog_blit(struct pipe_context *pctx, int rts, bool depth)
 {
        int i;
        struct ureg_src tc;
-       struct ureg_program *ureg = ureg_create(TGSI_PROCESSOR_FRAGMENT);
+       struct ureg_program *ureg;
+
+       debug_assert(rts <= MAX_RENDER_TARGETS);
+
+       ureg = ureg_create(TGSI_PROCESSOR_FRAGMENT);
        if (!ureg)
                return NULL;
 

diff --git a/src/gallium/drivers/freedreno/freedreno_util.h b/src/gallium/drivers/freedreno/freedreno_util.h
index 6aec2585ceba20defc03df406f2db3af82f2144d..ed56817349772747ab43eaa6e8e921af07e232b0 100644 (file)
--- a/src/gallium/drivers/freedreno/freedreno_util.h
+++ b/src/gallium/drivers/freedreno/freedreno_util.h
@@ -54,6 +54,12 @@ enum adreno_stencil_op fd_stencil_op(unsigned op);
 /* TBD if it is same on a2xx, but for now: */
 #define MAX_MIP_LEVELS A3XX_MAX_MIP_LEVELS
 
+#define A2XX_MAX_RENDER_TARGETS 1
+#define A3XX_MAX_RENDER_TARGETS 4
+#define A4XX_MAX_RENDER_TARGETS 8
+/* for now until a4xx MRT support: */
+#define MAX_RENDER_TARGETS A3XX_MAX_RENDER_TARGETS
+
 #define FD_DBG_MSGS     0x0001
 #define FD_DBG_DISASM   0x0002
 #define FD_DBG_DCLEAR   0x0004