for FP instructions.
testsuite/
* gas/mips/mips1-fp.s, testsuite/gas/mips/mips1-fp.d,
testsuite/gas/mips/mips1-fp.l: New tests.
* gas/mips/mips.exp: Run them.
+2008-11-06 Adam Nemet <anemet@caviumnetworks.com>
+
+ * config/tc-mips.c (COP_INSN): Change logic to always return false
+ for FP instructions.
+
2008-11-06 Chao-ying Fu <fu@mips.com>
* config/tc-mips.c (validate_mips_insn): Add case '1'.
/* Returns true for a (non floating-point) coprocessor instruction. Reading
or writing the condition code is only possible on the coprocessors and
these insns are not marked with INSN_COP. Thus for these insns use the
- condition-code flags unless this is the floating-point coprocessor. */
+ condition-code flags. */
#define COP_INSN(PINFO) \
(PINFO != INSN_MACRO \
- && (((PINFO) & INSN_COP) \
- || ((PINFO) & (INSN_READ_COND_CODE | INSN_WRITE_COND_CODE) \
- && ((PINFO) & (FP_S | FP_D)) == 0)))
+ && ((PINFO) & (FP_S | FP_D)) == 0 \
+ && ((PINFO) & (INSN_COP | INSN_READ_COND_CODE | INSN_WRITE_COND_CODE)))
/* MIPS PIC level. */
+2008-11-06 Adam Nemet <anemet@caviumnetworks.com>
+
+ * gas/mips/mips1-fp.s, testsuite/gas/mips/mips1-fp.d,
+ testsuite/gas/mips/mips1-fp.l: New tests.
+ * gas/mips/mips.exp: Run them.
+
2008-11-06 Chao-ying Fu <fu@mips.com>
* gas/mips/mips32-sync.d, gas/mip/mips32-sync.s: New tests.
run_dump_test_arches "abs" [mips_arch_list_matching mips1]
run_dump_test_arches "add" [mips_arch_list_matching mips1]
run_dump_test_arches "and" [mips_arch_list_matching mips1]
+ run_dump_test_arches "mips1-fp" [mips_arch_list_matching mips1]
+ run_list_test_arches "mips1-fp" "-32 -msoft-float" \
+ [mips_arch_list_matching mips1]
run_dump_test "break20"
run_dump_test "trap20"
--- /dev/null
+#as: -32
+#objdump: -M reg-names=numeric -dr
+#name: MIPS1 FP instructions
+
+.*: file format .*
+
+Disassembly of section .text:
+
+[0-9a-f]+ <foo>:
+.*: 46041000 add.s \$f0,\$f2,\$f4
+.*: 44420000 cfc1 \$2,\$0
+#pass
--- /dev/null
+.*: Assembler messages:
+.*:6: Error: opcode not supported on this processor: .* \(.*\) `add.s \$f0,\$f2,\$f4'
+.*:7: Error: opcode not supported on this processor: .* \(.*\) `cfc1 \$2,\$0'
--- /dev/null
+# Source file used to test -mips1 fp instructions.
+
+# This is not a complete list of mips1 FP instructions.
+
+foo:
+ add.s $f0,$f2,$f4
+ cfc1 $2,$0