i964/fs: Make immediate fs_reg constructors explicit

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index ec132fccbdc441927006297f607bd88077f6be8b..bd862abb8966e7a0dbf76f27a2d1725e9b6985f1 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -279,7 +279,7 @@ fs_visitor::VARYING_PULL_CONSTANT_LOAD(const fs_reg &dst,
     */
    fs_reg vec4_offset = fs_reg(this, glsl_type::int_type);
    instructions.push_tail(ADD(vec4_offset,
-                              varying_offset, const_offset & ~3));
+                              varying_offset, fs_reg(const_offset & ~3)));
 
    int scale = 1;
    if (brw->gen == 4 && dispatch_width == 8) {

diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index 9c6b047d6ea059abb1044df8c19932a01349912f..f0da0a014d72af05411931383a32b29bbfa83d1d 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -69,9 +69,9 @@ public:
    void init();
 
    fs_reg();
-   fs_reg(float f);
-   fs_reg(int32_t i);
-   fs_reg(uint32_t u);
+   explicit fs_reg(float f);
+   explicit fs_reg(int32_t i);
+   explicit fs_reg(uint32_t u);
    fs_reg(struct brw_reg fixed_hw_reg);
    fs_reg(enum register_file file, int reg);
    fs_reg(enum register_file file, int reg, enum brw_reg_type type);

diff --git a/src/mesa/drivers/dri/i965/brw_fs_fp.cpp b/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
index 63bd55ec8e780e0ef82ff36b66a76b7b31ee0c56..f9eec10a04b208f4941467725d9bc6fb0573c06a 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
@@ -489,7 +489,7 @@ fs_visitor::emit_fragment_program_code()
 
          fs_inst *inst;
          if (brw->gen >= 7) {
-            inst = emit_texture_gen7(ir, dst, coordinate, shadow_c, lod, dpdy, sample_index, fs_reg(0u), fpi->TexSrcUnit);
+            inst = emit_texture_gen7(ir, dst, coordinate, shadow_c, lod, dpdy, sample_index, fs_reg(0u), fs_reg(fpi->TexSrcUnit));
          } else if (brw->gen >= 5) {
             inst = emit_texture_gen5(ir, dst, coordinate, shadow_c, lod, dpdy, sample_index, fpi->TexSrcUnit);
          } else {

diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index ba9f6e1640df75275250dc00ba86e910f132579a..bd15ec88aad8a934239ef89e5d98bf749c30616b 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -2633,10 +2633,10 @@ fs_visitor::visit_atomic_counter_intrinsic(ir_call *ir)
       deref_array->array_index->accept(this);
 
       fs_reg tmp(this, glsl_type::uint_type);
-      emit(MUL(tmp, this->result, ATOMIC_COUNTER_SIZE));
-      emit(ADD(offset, tmp, location->data.atomic.offset));
+      emit(MUL(tmp, this->result, fs_reg(ATOMIC_COUNTER_SIZE)));
+      emit(ADD(offset, tmp, fs_reg(location->data.atomic.offset)));
    } else {
-      offset = location->data.atomic.offset;
+      offset = fs_reg(location->data.atomic.offset);
    }
 
    /* Emit the appropriate machine instruction */
@@ -2759,7 +2759,8 @@ fs_visitor::emit_untyped_atomic(unsigned atomic_op, unsigned surf_index,
    }
 
    /* Emit the instruction. */
-   inst = emit(SHADER_OPCODE_UNTYPED_ATOMIC, dst, atomic_op, surf_index);
+   inst = emit(SHADER_OPCODE_UNTYPED_ATOMIC, dst,
+               fs_reg(atomic_op), fs_reg(surf_index));
    inst->base_mrf = 0;
    inst->mlen = mlen;
    inst->header_present = true;
@@ -2796,7 +2797,7 @@ fs_visitor::emit_untyped_surface_read(unsigned surf_index, fs_reg dst,
    mlen += operand_len;
 
    /* Emit the instruction. */
-   inst = emit(SHADER_OPCODE_UNTYPED_SURFACE_READ, dst, surf_index);
+   inst = emit(SHADER_OPCODE_UNTYPED_SURFACE_READ, dst, fs_reg(surf_index));
    inst->base_mrf = 0;
    inst->mlen = mlen;
    inst->header_present = true;