Merge pull request #2028 from zachjs/master
authorEddie Hung <eddie@fpgeh.com>
Wed, 6 May 2020 19:10:28 +0000 (12:10 -0700)
committerGitHub <noreply@github.com>
Wed, 6 May 2020 19:10:28 +0000 (12:10 -0700)
verilog: allow null gen-if then block

1  2 
frontends/verilog/verilog_parser.y

Simple merge