LLVMValueRef vindex,
LLVMValueRef voffset,
unsigned num_channels,
- bool glc,
- bool slc,
+ unsigned cache_policy,
bool use_format)
{
LLVMValueRef args[] = {
LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
vindex ? vindex : ctx->i32_0,
voffset,
- LLVMConstInt(ctx->i1, glc, 0),
- LLVMConstInt(ctx->i1, slc, 0)
+ LLVMConstInt(ctx->i1, !!(cache_policy & ac_glc), 0),
+ LLVMConstInt(ctx->i1, !!(cache_policy & ac_slc), 0)
};
unsigned func = CLAMP(num_channels, 1, 3) - 1;
LLVMValueRef soffset,
unsigned num_channels,
LLVMTypeRef return_channel_type,
- bool glc,
- bool slc,
+ unsigned cache_policy,
bool use_format,
bool structurized)
{
args[idx++] = vindex ? vindex : ctx->i32_0;
args[idx++] = voffset ? voffset : ctx->i32_0;
args[idx++] = soffset ? soffset : ctx->i32_0;
- args[idx++] = get_cache_policy(ctx, false, glc, slc);
+ args[idx++] = LLVMConstInt(ctx->i32, cache_policy, 0);
unsigned func = !ac_has_vec3_support(ctx->chip_class, use_format) && num_channels == 3 ? 4 : num_channels;
const char *indexing_kind = structurized ? "struct" : "raw";
char name[256], type_name[8];
LLVMValueRef vindex,
LLVMValueRef voffset,
unsigned num_channels,
- bool glc,
- bool slc)
+ unsigned cache_policy)
{
if (HAVE_LLVM >= 0x800) {
ac_build_llvm8_buffer_store_common(ctx, rsrc, data, vindex,
voffset, NULL, num_channels,
- ctx->f32, glc, slc,
+ ctx->f32, cache_policy,
true, true);
} else {
ac_build_llvm7_buffer_store_common(ctx, rsrc, data, vindex, voffset,
- num_channels, glc, slc,
+ num_channels, cache_policy,
true);
}
}
LLVMValueRef voffset,
LLVMValueRef soffset,
unsigned inst_offset,
- bool glc,
- bool slc,
+ unsigned cache_policy,
bool swizzle_enable_hint)
{
/* Split 3 channel stores, because only LLVM 9+ support 3-channel
v01 = ac_build_gather_values(ctx, v, 2);
ac_build_buffer_store_dword(ctx, rsrc, v01, 2, voffset,
- soffset, inst_offset, glc, slc,
+ soffset, inst_offset, cache_policy,
swizzle_enable_hint);
ac_build_buffer_store_dword(ctx, rsrc, v[2], 1, voffset,
soffset, inst_offset + 8,
- glc, slc,
+ cache_policy,
swizzle_enable_hint);
return;
}
voffset, offset,
num_channels,
ctx->f32,
- glc, slc,
+ cache_policy,
false, false);
} else {
if (voffset)
ac_build_llvm7_buffer_store_common(ctx, rsrc,
ac_to_float(ctx, vdata),
ctx->i32_0, offset,
- num_channels, glc, slc,
+ num_channels, cache_policy,
false);
}
return;
LLVMValueRef immoffset = LLVMConstInt(ctx->i32, inst_offset, 0);
ac_build_raw_tbuffer_store(ctx, rsrc, vdata, voffset, soffset,
- immoffset, num_channels, dfmt, nfmt, glc,
- slc);
+ immoffset, num_channels, dfmt, nfmt, cache_policy);
}
static LLVMValueRef
unsigned num_channels,
unsigned dfmt,
unsigned nfmt,
- bool glc,
- bool slc,
+ unsigned cache_policy,
bool structurized)
{
LLVMValueRef args[7];
args[idx++] = voffset ? voffset : ctx->i32_0;
args[idx++] = soffset ? soffset : ctx->i32_0;
args[idx++] = LLVMConstInt(ctx->i32, ac_get_tbuffer_format(ctx, dfmt, nfmt), 0);
- args[idx++] = get_cache_policy(ctx, false, glc, slc);
+ args[idx++] = LLVMConstInt(ctx->i32, cache_policy, 0);
unsigned func = !ac_has_vec3_support(ctx->chip_class, true) && num_channels == 3 ? 4 : num_channels;
const char *indexing_kind = structurized ? "struct" : "raw";
char name[256], type_name[8];
unsigned num_channels,
unsigned dfmt,
unsigned nfmt,
- bool glc,
- bool slc,
+ unsigned cache_policy,
bool structurized) /* only matters for LLVM 8+ */
{
if (HAVE_LLVM >= 0x800) {
ac_build_llvm8_tbuffer_store(ctx, rsrc, vdata, vindex, voffset,
soffset, num_channels, dfmt, nfmt,
- glc, slc, structurized);
+ cache_policy, structurized);
} else {
LLVMValueRef params[] = {
vdata,
immoffset,
LLVMConstInt(ctx->i32, dfmt, false),
LLVMConstInt(ctx->i32, nfmt, false),
- LLVMConstInt(ctx->i1, glc, false),
- LLVMConstInt(ctx->i1, slc, false),
+ LLVMConstInt(ctx->i1, !!(cache_policy & ac_glc), false),
+ LLVMConstInt(ctx->i1, !!(cache_policy & ac_slc), false),
};
unsigned func = CLAMP(num_channels, 1, 3) - 1;
const char *type_names[] = {"i32", "v2i32", "v4i32"};
unsigned num_channels,
unsigned dfmt,
unsigned nfmt,
- bool glc,
- bool slc)
+ unsigned cache_policy)
{
ac_build_tbuffer_store(ctx, rsrc, vdata, vindex, voffset, soffset,
- immoffset, num_channels, dfmt, nfmt, glc, slc,
+ immoffset, num_channels, dfmt, nfmt, cache_policy,
true);
}
unsigned num_channels,
unsigned dfmt,
unsigned nfmt,
- bool glc,
- bool slc)
+ unsigned cache_policy)
{
ac_build_tbuffer_store(ctx, rsrc, vdata, NULL, voffset, soffset,
- immoffset, num_channels, dfmt, nfmt, glc, slc,
+ immoffset, num_channels, dfmt, nfmt, cache_policy,
false);
}
LLVMValueRef vdata,
LLVMValueRef voffset,
LLVMValueRef soffset,
- bool glc)
+ unsigned cache_policy)
{
vdata = LLVMBuildBitCast(ctx->builder, vdata, ctx->i16, "");
/* LLVM 9+ supports i8/i16 with struct/raw intrinsics. */
ac_build_llvm8_buffer_store_common(ctx, rsrc, vdata, NULL,
voffset, soffset, 1,
- ctx->i16, glc, false,
+ ctx->i16, cache_policy,
false, false);
} else {
unsigned dfmt = V_008F0C_BUF_DATA_FORMAT_16;
vdata = LLVMBuildZExt(ctx->builder, vdata, ctx->i32, "");
ac_build_raw_tbuffer_store(ctx, rsrc, vdata, voffset, soffset,
- ctx->i32_0, 1, dfmt, nfmt, glc,
- false);
+ ctx->i32_0, 1, dfmt, nfmt, cache_policy);
}
}
LLVMValueRef vdata,
LLVMValueRef voffset,
LLVMValueRef soffset,
- bool glc)
+ unsigned cache_policy)
{
vdata = LLVMBuildBitCast(ctx->builder, vdata, ctx->i8, "");
/* LLVM 9+ supports i8/i16 with struct/raw intrinsics. */
ac_build_llvm8_buffer_store_common(ctx, rsrc, vdata, NULL,
voffset, soffset, 1,
- ctx->i8, glc, false,
+ ctx->i8, cache_policy,
false, false);
} else {
unsigned dfmt = V_008F0C_BUF_DATA_FORMAT_8;
vdata = LLVMBuildZExt(ctx->builder, vdata, ctx->i32, "");
ac_build_raw_tbuffer_store(ctx, rsrc, vdata, voffset, soffset,
- ctx->i32_0, 1, dfmt, nfmt, glc, false);
+ ctx->i32_0, 1, dfmt, nfmt, cache_policy);
}
}
/**
LLVMValueRef voffset,
LLVMValueRef soffset,
unsigned inst_offset,
- bool glc,
- bool slc,
+ unsigned cache_policy,
bool swizzle_enable_hint);
void
LLVMValueRef vindex,
LLVMValueRef voffset,
unsigned num_channels,
- bool glc,
- bool slc);
+ unsigned cache_policy);
LLVMValueRef
ac_build_buffer_load(struct ac_llvm_context *ctx,
LLVMValueRef vdata,
LLVMValueRef voffset,
LLVMValueRef soffset,
- bool glc);
+ unsigned cache_policy);
void
ac_build_tbuffer_store_byte(struct ac_llvm_context *ctx,
LLVMValueRef vdata,
LLVMValueRef voffset,
LLVMValueRef soffset,
- bool glc);
+ unsigned cache_policy);
void
ac_build_struct_tbuffer_store(struct ac_llvm_context *ctx,
unsigned num_channels,
unsigned dfmt,
unsigned nfmt,
- bool glc,
- bool slc);
+ unsigned cache_policy);
void
ac_build_raw_tbuffer_store(struct ac_llvm_context *ctx,
unsigned num_channels,
unsigned dfmt,
unsigned nfmt,
- bool glc,
- bool slc);
+ unsigned cache_policy);
LLVMValueRef
ac_get_thread_id(struct ac_llvm_context *ctx);
if (num_bytes == 1) {
ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
offset, ctx->ac.i32_0,
- cache_policy & ac_glc);
+ cache_policy);
} else if (num_bytes == 2) {
ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
offset, ctx->ac.i32_0,
- cache_policy & ac_glc);
+ cache_policy);
} else {
int num_channels = num_bytes / 4;
ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
num_channels, offset,
ctx->ac.i32_0, 0,
- cache_policy & ac_glc,
- false, false);
+ cache_policy, false);
}
}
}
ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
ctx->ac.i32_0, src_channels,
- args.cache_policy & ac_glc, false);
+ args.cache_policy);
} else {
args.opcode = ac_image_store;
args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
if (!is_tess_factor && writemask != 0xF)
ac_build_buffer_store_dword(&ctx->ac, ctx->hs_ring_tess_offchip, value, 1,
buf_addr, ctx->oc_lds,
- 4 * (base + chan), 1, 0, false);
+ 4 * (base + chan), ac_glc, false);
}
if (writemask == 0xF) {
ac_build_buffer_store_dword(&ctx->ac, ctx->hs_ring_tess_offchip, src, 4,
buf_addr, ctx->oc_lds,
- (base * 4), 1, 0, false);
+ (base * 4), ac_glc, false);
}
}
ctx->gsvs_ring[stream],
out_val, 1,
voffset, ctx->gs2vs_offset, 0,
- 1, 1, true);
+ ac_glc | ac_slc, true);
}
}
ac_build_buffer_store_dword(&ctx->ac, so_buffers[buf],
vdata, num_comps, so_write_offsets[buf],
ctx->ac.i32_0, offset,
- 1, 1, false);
+ ac_glc | ac_slc, false);
}
static void
out_val, 1,
NULL, ctx->es2gs_offset,
(4 * param_index + j) * 4,
- 1, 1, true);
+ ac_glc | ac_slc, true);
}
}
}
ac_build_buffer_store_dword(&ctx->ac, buffer,
LLVMConstInt(ctx->ac.i32, 0x80000000, false),
1, ctx->ac.i32_0, tf_base,
- 0, 1, 0, false);
+ 0, ac_glc, false);
tf_offset += 4;
ac_nir_build_endif(&inner_if_ctx);
/* Store the tessellation factors. */
ac_build_buffer_store_dword(&ctx->ac, buffer, vec0,
MIN2(stride, 4), byteoffset, tf_base,
- tf_offset, 1, 0, false);
+ tf_offset, ac_glc, false);
if (vec1)
ac_build_buffer_store_dword(&ctx->ac, buffer, vec1,
stride - 4, byteoffset, tf_base,
- 16 + tf_offset, 1, 0, false);
+ 16 + tf_offset, ac_glc, false);
//store to offchip for TES to read - only if TES reads them
if (ctx->options->key.tcs.tes_reads_tess_factors) {
ac_build_buffer_store_dword(&ctx->ac, ctx->hs_ring_tess_offchip, outer_vec,
outer_comps, tf_outer_offset,
- ctx->oc_lds, 0, 1, 0, false);
+ ctx->oc_lds, 0, ac_glc, false);
if (inner_comps) {
param_inner = shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_INNER);
tf_inner_offset = get_tcs_tes_buffer_address(ctx, NULL,
ac_build_gather_values(&ctx->ac, inner, inner_comps);
ac_build_buffer_store_dword(&ctx->ac, ctx->hs_ring_tess_offchip, inner_vec,
inner_comps, tf_inner_offset,
- ctx->oc_lds, 0, 1, 0, false);
+ ctx->oc_lds, 0, ac_glc, false);
}
}
ac_nir_build_endif(&if_ctx);
};
LLVMValueRef rsrc = ac_build_gather_values(&ctx->ac, desc, 4);
ac_build_buffer_store_dword(&ctx->ac, rsrc, count, 1, ctx->i32_0,
- ctx->i32_0, 0, true, true, false);
+ ctx->i32_0, 0, ac_glc | ac_slc, false);
} else {
LLVMBuildStore(builder, count,
si_expand_32bit_pointer(ctx, vertex_count_addr));
vdata = ac_build_expand_to_vec4(&ctx->ac, vdata, 3);
ac_build_buffer_store_format(&ctx->ac, output_indexbuf, vdata,
- vindex, ctx->i32_0, 3, true,
- INDEX_STORES_USE_SLC);
+ vindex, ctx->i32_0, 3,
+ ac_glc | (INDEX_STORES_USE_SLC ? ac_slc : 0));
}
lp_build_endif(&if_accepted);
if (reg->Register.WriteMask != 0xF && !is_tess_factor) {
ac_build_buffer_store_dword(&ctx->ac, buffer, value, 1,
buf_addr, base,
- 4 * chan_index, 1, 0, false);
+ 4 * chan_index, ac_glc, false);
}
/* Write tess factors into VGPRs for the epilog. */
LLVMValueRef value = ac_build_gather_values(&ctx->ac,
values, 4);
ac_build_buffer_store_dword(&ctx->ac, buffer, value, 4, buf_addr,
- base, 0, 1, 0, false);
+ base, 0, ac_glc, false);
}
}
ac_build_buffer_store_dword(&ctx->ac, buffer, value, 1,
addr, base,
4 * buffer_store_offset,
- 1, 0, false);
+ ac_glc, false);
}
/* Write tess factors into VGPRs for the epilog. */
LLVMValueRef value = ac_build_gather_values(&ctx->ac,
values, 4);
ac_build_buffer_store_dword(&ctx->ac, buffer, value, 4, addr,
- base, 0, 1, 0, false);
+ base, 0, ac_glc, false);
}
}
vdata, num_comps,
so_write_offsets[buf_idx],
ctx->i32_0,
- stream_out->dst_offset * 4, 1, 1, false);
+ stream_out->dst_offset * 4, ac_glc | ac_slc, false);
}
/**
LLVMValueRef value = lshs_lds_load(bld_base, ctx->ac.i32, ~0, lds_ptr);
ac_build_buffer_store_dword(&ctx->ac, buffer, value, 4, buffer_addr,
- buffer_offset, 0, 1, 0, false);
+ buffer_offset, 0, ac_glc, false);
}
}
ac_build_buffer_store_dword(&ctx->ac, buffer,
LLVMConstInt(ctx->i32, 0x80000000, 0),
1, ctx->i32_0, tf_base,
- offset, 1, 0, false);
+ offset, ac_glc, false);
offset += 4;
}
/* Store the tessellation factors. */
ac_build_buffer_store_dword(&ctx->ac, buffer, vec0,
MIN2(stride, 4), byteoffset, tf_base,
- offset, 1, 0, false);
+ offset, ac_glc, false);
offset += 16;
if (vec1)
ac_build_buffer_store_dword(&ctx->ac, buffer, vec1,
stride - 4, byteoffset, tf_base,
- offset, 1, 0, false);
+ offset, ac_glc, false);
/* Store the tess factors into the offchip buffer if TES reads them. */
if (shader->key.part.tcs.epilog.tes_reads_tess_factors) {
ac_build_buffer_store_dword(&ctx->ac, buf, outer_vec,
outer_comps, tf_outer_offset,
- base, 0, 1, 0, false);
+ base, 0, ac_glc, false);
if (inner_comps) {
param_inner = si_shader_io_get_unique_index_patch(
TGSI_SEMANTIC_TESSINNER, 0);
ac_build_gather_values(&ctx->ac, inner, inner_comps);
ac_build_buffer_store_dword(&ctx->ac, buf, inner_vec,
inner_comps, tf_inner_offset,
- base, 0, 1, 0, false);
+ base, 0, ac_glc, false);
}
}
ctx->esgs_ring,
out_val, 1, NULL, soffset,
(4 * param + chan) * 4,
- 1, 1, true);
+ ac_glc | ac_slc, true);
}
}
ctx->gsvs_ring[stream],
out_val, 1,
voffset, soffset, 0,
- 1, 1, true);
+ ac_glc | ac_slc, true);
}
}
}
ac_build_buffer_store_dword(&ctx->ac, resource, data, count,
- voff, ctx->i32_0, 0,
- !!(cache_policy & ac_glc),
- !!(cache_policy & ac_slc),
+ voff, ctx->i32_0, 0, cache_policy,
false);
}
}
ac_build_gather_values(&ctx->ac, chans, num_channels),
vindex, ctx->i32_0 /* voffset */,
num_channels,
- !!(args.cache_policy & ac_glc),
- false);
+ args.cache_policy);
} else {
args.opcode = ac_image_store;
args.data[0] = ac_build_gather_values(&ctx->ac, chans, 4);
projects / mesa.git / commitdiff