gallium: add TGSI_PROPERTY_MUL_ZERO_WINS

This will be useful for proper D3D9 emulation, where this behavior is
expected by some shaders.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Axel Davy <axel.davy@ens.fr>

diff --git a/src/gallium/auxiliary/tgsi/tgsi_strings.c b/src/gallium/auxiliary/tgsi/tgsi_strings.c
index 536a4c8f3a933355cc9cfc1bda67163819dfa89e..cebc1b49d986bac813b2e635d1689c674cc86124 100644 (file)
--- a/src/gallium/auxiliary/tgsi/tgsi_strings.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_strings.c
@@ -148,7 +148,8 @@ const char *tgsi_property_names[TGSI_PROPERTY_COUNT] =
    "NEXT_SHADER",
    "CS_FIXED_BLOCK_WIDTH",
    "CS_FIXED_BLOCK_HEIGHT",
-   "CS_FIXED_BLOCK_DEPTH"
+   "CS_FIXED_BLOCK_DEPTH",
+   "MUL_ZERO_WINS",
 };
 
 const char *tgsi_return_type_names[TGSI_RETURN_TYPE_COUNT] =

diff --git a/src/gallium/docs/source/tgsi.rst b/src/gallium/docs/source/tgsi.rst
index b981278821cdf7012605b5a226b1e37cee8ec8dc..341b41fb2da271cebc8f9a792ee38f898264e94e 100644 (file)
--- a/src/gallium/docs/source/tgsi.rst
+++ b/src/gallium/docs/source/tgsi.rst
@@ -3547,13 +3547,26 @@ Which shader stage will MOST LIKELY follow after this shader when the shader
 is bound. This is only a hint to the driver and doesn't have to be precise.
 Only set for VS and TES.
 
-TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH / HEIGHT / DEPTH
-"""""""""""""""""""""""""""""""""""""""""""""""""""
+CS_FIXED_BLOCK_WIDTH / HEIGHT / DEPTH
+"""""""""""""""""""""""""""""""""""""
 
 Threads per block in each dimension, if known at compile time. If the block size
 is known all three should be at least 1. If it is unknown they should all be set
 to 0 or not set.
 
+MUL_ZERO_WINS
+"""""""""""""
+
+The MUL TGSI operation (FP32 multiplication) will return 0 if either
+of the operands are equal to 0. That means that 0 * Inf = 0. This
+should be set the same way for an entire pipeline. Note that this
+applies not only to the literal MUL TGSI opcode, but all FP32
+multiplications implied by other operations, such as MAD, FMA, DP2,
+DP3, DP4, DPH, DST, LOG, LRP, XPD, and possibly others. If there is a
+mismatch between shaders, then it is unspecified whether this behavior
+will be enabled.
+
+
 Texture Sampling and Texture Formats
 ------------------------------------
 

diff --git a/src/gallium/include/pipe/p_shader_tokens.h b/src/gallium/include/pipe/p_shader_tokens.h
index b2d440a0b9178d1f829b1a9fd21e06b7a721378d..1c8d87cce902cc160c7533fdcede3e4f434ff258 100644 (file)
--- a/src/gallium/include/pipe/p_shader_tokens.h
+++ b/src/gallium/include/pipe/p_shader_tokens.h
@@ -290,6 +290,7 @@ enum tgsi_property_name {
    TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH,
    TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT,
    TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH,
+   TGSI_PROPERTY_MUL_ZERO_WINS,
    TGSI_PROPERTY_COUNT,
 };