if (has_tcl) {
R300_STATECHANGE(r300, pvs);
reg_start(R300_VAP_PVS_CNTL_1, 2);
+
e32((0 << R300_PVS_CNTL_1_PROGRAM_START_SHIFT) |
(0 << R300_PVS_CNTL_1_POS_END_SHIFT) |
(1 << R300_PVS_CNTL_1_PROGRAM_END_SHIFT));
R300_STATECHANGE(r300, vpi);
vsf_start_fragment(0x0, 8);
- e32(VP_OUT(ADD, OUT, 0, XYZW));
- e32(VP_IN(INPUT, 0));
- e32(VP_ZERO());
+
+ e32(PVS_OP_DST_OPERAND(VE_ADD, GL_FALSE, GL_FALSE, 0, 0xf, PVS_DST_REG_OUT));
+ e32(PVS_SRC_OPERAND(0, PVS_SRC_SELECT_X, PVS_SRC_SELECT_Y, PVS_SRC_SELECT_Z, PVS_SRC_SELECT_W, PVS_SRC_REG_INPUT, VSF_FLAG_NONE));
+ e32(PVS_SRC_OPERAND(0, PVS_SRC_SELECT_FORCE_0, PVS_SRC_SELECT_FORCE_0, PVS_SRC_SELECT_FORCE_0, PVS_SRC_SELECT_FORCE_0, PVS_SRC_REG_INPUT, VSF_FLAG_NONE));
e32(0x0);
- e32(VP_OUT(ADD, OUT, 1, XYZW));
- e32(VP_IN(INPUT, 1));
- e32(VP_ZERO());
+ e32(PVS_OP_DST_OPERAND(VE_ADD, GL_FALSE, GL_FALSE, 1, 0xf, PVS_DST_REG_OUT));
+ e32(PVS_SRC_OPERAND(1, PVS_SRC_SELECT_X, PVS_SRC_SELECT_Y, PVS_SRC_SELECT_Z, PVS_SRC_SELECT_W, PVS_SRC_REG_INPUT, VSF_FLAG_NONE));
+ e32(PVS_SRC_OPERAND(1, PVS_SRC_SELECT_FORCE_0, PVS_SRC_SELECT_FORCE_0, PVS_SRC_SELECT_FORCE_0, PVS_SRC_SELECT_FORCE_0, PVS_SRC_REG_INPUT, VSF_FLAG_NONE));
e32(0x0);
}
}
#define VSF_FLAG_ALL 0xf
#define VSF_FLAG_NONE 0
-#define R300_VPI_OUT_WRITE_X (1 << 20)
-#define R300_VPI_OUT_WRITE_Y (1 << 21)
-#define R300_VPI_OUT_WRITE_Z (1 << 22)
-#define R300_VPI_OUT_WRITE_W (1 << 23)
-
-#define VP_OUTMASK_X R300_VPI_OUT_WRITE_X
-#define VP_OUTMASK_Y R300_VPI_OUT_WRITE_Y
-#define VP_OUTMASK_Z R300_VPI_OUT_WRITE_Z
-#define VP_OUTMASK_W R300_VPI_OUT_WRITE_W
-#define VP_OUTMASK_XY (VP_OUTMASK_X|VP_OUTMASK_Y)
-#define VP_OUTMASK_XZ (VP_OUTMASK_X|VP_OUTMASK_Z)
-#define VP_OUTMASK_XW (VP_OUTMASK_X|VP_OUTMASK_W)
-#define VP_OUTMASK_XYZ (VP_OUTMASK_XY|VP_OUTMASK_Z)
-#define VP_OUTMASK_XYW (VP_OUTMASK_XY|VP_OUTMASK_W)
-#define VP_OUTMASK_XZW (VP_OUTMASK_XZ|VP_OUTMASK_W)
-#define VP_OUTMASK_XYZW (VP_OUTMASK_XYZ|VP_OUTMASK_W)
-#define VP_OUTMASK_YZ (VP_OUTMASK_Y|VP_OUTMASK_Z)
-#define VP_OUTMASK_YW (VP_OUTMASK_Y|VP_OUTMASK_W)
-#define VP_OUTMASK_YZW (VP_OUTMASK_YZ|VP_OUTMASK_W)
-#define VP_OUTMASK_ZW (VP_OUTMASK_Z|VP_OUTMASK_W)
-
-#define VP_OUT(instr,outclass,outidx,outmask) \
- (VE_##instr | \
- ((outidx & PVS_DST_OFFSET_MASK) << PVS_DST_OFFSET_SHIFT) | \
- ((PVS_DST_REG_##outclass & PVS_DST_REG_TYPE_MASK) << PVS_DST_REG_TYPE_SHIFT) | \
- VP_OUTMASK_##outmask)
-
-#define VP_IN(inclass,inidx) \
- (((inidx & PVS_SRC_OFFSET_MASK) << PVS_SRC_OFFSET_SHIFT) | \
- ((PVS_SRC_REG_##inclass & PVS_SRC_REG_TYPE_MASK) << PVS_SRC_REG_TYPE_SHIFT) | \
- ((PVS_SRC_SELECT_X & PVS_SRC_SWIZZLE_X_MASK) << PVS_SRC_SWIZZLE_X_SHIFT) | \
- ((PVS_SRC_SELECT_Y & PVS_SRC_SWIZZLE_Y_MASK) << PVS_SRC_SWIZZLE_Y_SHIFT) | \
- ((PVS_SRC_SELECT_Z & PVS_SRC_SWIZZLE_Z_MASK) << PVS_SRC_SWIZZLE_Z_SHIFT) | \
- ((PVS_SRC_SELECT_W & PVS_SRC_SWIZZLE_W_MASK) << PVS_SRC_SWIZZLE_W_SHIFT))
-#define VP_ZERO() \
- (((PVS_SRC_SELECT_FORCE_0 & PVS_SRC_SWIZZLE_X_MASK) << PVS_SRC_SWIZZLE_X_SHIFT) | \
- ((PVS_SRC_SELECT_FORCE_0 & PVS_SRC_SWIZZLE_Y_MASK) << PVS_SRC_SWIZZLE_Y_SHIFT) | \
- ((PVS_SRC_SELECT_FORCE_0 & PVS_SRC_SWIZZLE_Z_MASK) << PVS_SRC_SWIZZLE_Z_SHIFT) | \
- ((PVS_SRC_SELECT_FORCE_0 & PVS_SRC_SWIZZLE_W_MASK) << PVS_SRC_SWIZZLE_W_SHIFT))
-#define VP_ONE() \
- (((PVS_SRC_SELECT_FORCE_1 & PVS_SRC_SWIZZLE_X_MASK) << PVS_SRC_SWIZZLE_X_SHIFT) | \
- ((PVS_SRC_SELECT_FORCE_1 & PVS_SRC_SWIZZLE_Y_MASK) << PVS_SRC_SWIZZLE_Y_SHIFT) | \
- ((PVS_SRC_SELECT_FORCE_1 & PVS_SRC_SWIZZLE_Z_MASK) << PVS_SRC_SWIZZLE_Z_SHIFT) | \
- ((PVS_SRC_SELECT_FORCE_1 & PVS_SRC_SWIZZLE_W_MASK) << PVS_SRC_SWIZZLE_W_SHIFT))
-
#endif
#endif