r600g: Move fetch shader register setup to r600_state.c / evergreen_state.c.

Signed-off-by: Henri Verbeet <hverbeet@gmail.com>

diff --git a/src/gallium/drivers/r600/eg_asm.c b/src/gallium/drivers/r600/eg_asm.c
index 8190df725dfa5fdba71d7b57a84d9802755ea3a8..3793b919dde0863435f42ec20bbad9e53c509268 100644 (file)
--- a/src/gallium/drivers/r600/eg_asm.c
+++ b/src/gallium/drivers/r600/eg_asm.c
@@ -93,15 +93,3 @@ int eg_bc_cf_build(struct r600_bc *bc, struct r600_bc_cf *cf)
        }
        return 0;
 }
-
-void eg_cf_vtx(struct r600_vertex_element *ve)
-{
-       struct r600_pipe_state *rstate = &ve->rstate;
-       rstate->id = R600_PIPE_STATE_FETCH_SHADER;
-       rstate->nregs = 0;
-       r600_pipe_state_add_reg(rstate, R_0288A8_SQ_PGM_RESOURCES_FS,
-                               0x00000000, 0xFFFFFFFF, NULL);
-       r600_pipe_state_add_reg(rstate, R_0288A4_SQ_PGM_START_FS,
-                               (r600_bo_offset(ve->fetch_shader)) >> 8,
-                               0xFFFFFFFF, ve->fetch_shader);
-}

diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index 4206b4a201d8ba890dd64d9b78fa0ec4666b92e4..812795fd29b486d03b09cd16e2bca035dc311cc8 100644 (file)
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -1501,6 +1501,18 @@ void evergreen_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader
                                0xFFFFFFFF, NULL);
 }
 
+void evergreen_fetch_shader(struct r600_vertex_element *ve)
+{
+       struct r600_pipe_state *rstate = &ve->rstate;
+       rstate->id = R600_PIPE_STATE_FETCH_SHADER;
+       rstate->nregs = 0;
+       r600_pipe_state_add_reg(rstate, R_0288A8_SQ_PGM_RESOURCES_FS,
+                               0x00000000, 0xFFFFFFFF, NULL);
+       r600_pipe_state_add_reg(rstate, R_0288A4_SQ_PGM_START_FS,
+                               (r600_bo_offset(ve->fetch_shader)) >> 8,
+                               0xFFFFFFFF, ve->fetch_shader);
+}
+
 void *evergreen_create_db_flush_dsa(struct r600_pipe_context *rctx)
 {
        struct pipe_depth_stencil_alpha_state dsa;

diff --git a/src/gallium/drivers/r600/r600_asm.c b/src/gallium/drivers/r600/r600_asm.c
index 1504ef654f0733a81dfe9c357ca1df68757a2753..df7c5b3fbbcc1acb75d301c7bfcabec175e657cd 100644 (file)
--- a/src/gallium/drivers/r600/r600_asm.c
+++ b/src/gallium/drivers/r600/r600_asm.c
@@ -1918,22 +1918,6 @@ void r600_bc_dump(struct r600_bc *bc)
        fprintf(stderr, "--------------------------------------\n");
 }
 
-static void r600_cf_vtx(struct r600_vertex_element *ve)
-{
-       struct r600_pipe_state *rstate;
-
-       rstate = &ve->rstate;
-       rstate->id = R600_PIPE_STATE_FETCH_SHADER;
-       rstate->nregs = 0;
-       r600_pipe_state_add_reg(rstate, R_0288A4_SQ_PGM_RESOURCES_FS,
-                               0x00000000, 0xFFFFFFFF, NULL);
-       r600_pipe_state_add_reg(rstate, R_0288DC_SQ_PGM_CF_OFFSET_FS,
-                               0x00000000, 0xFFFFFFFF, NULL);
-       r600_pipe_state_add_reg(rstate, R_028894_SQ_PGM_START_FS,
-                               r600_bo_offset(ve->fetch_shader) >> 8,
-                               0xFFFFFFFF, ve->fetch_shader);
-}
-
 static void r600_vertex_data_type(enum pipe_format pformat, unsigned *format,
                                unsigned *num_format, unsigned *format_comp)
 {
@@ -2191,9 +2175,9 @@ int r600_vertex_elements_build_fetch_shader(struct r600_pipe_context *rctx, stru
        r600_bc_clear(&bc);
 
        if (rctx->family >= CHIP_CEDAR)
-               eg_cf_vtx(ve);
+               evergreen_fetch_shader(ve);
        else
-               r600_cf_vtx(ve);
+               r600_fetch_shader(ve);
 
        return 0;
 }

diff --git a/src/gallium/drivers/r600/r600_asm.h b/src/gallium/drivers/r600/r600_asm.h
index f9f4d037eb1ded4e68f3d3e6cc53a5e582abe2bb..27ea293ebe55cf0f6ccd9301cc5092fe5cda988d 100644 (file)
--- a/src/gallium/drivers/r600/r600_asm.h
+++ b/src/gallium/drivers/r600/r600_asm.h
@@ -190,7 +190,6 @@ struct r600_bc {
 
 /* eg_asm.c */
 int eg_bc_cf_build(struct r600_bc *bc, struct r600_bc_cf *cf);
-void eg_cf_vtx(struct r600_vertex_element *ve);
 
 /* r600_asm.c */
 int r600_bc_init(struct r600_bc *bc, enum radeon_family family);

diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h
index 87eae0a292025ad124ae83783a6a2a665ac79d8f..396801e4a4192697c810a0277bae234394f44c88 100644 (file)
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -176,6 +176,7 @@ void evergreen_init_state_functions(struct r600_pipe_context *rctx);
 void evergreen_init_config(struct r600_pipe_context *rctx);
 void evergreen_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shader);
 void evergreen_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shader);
+void evergreen_fetch_shader(struct r600_vertex_element *ve);
 void *evergreen_create_db_flush_dsa(struct r600_pipe_context *rctx);
 void evergreen_polygon_offset_update(struct r600_pipe_context *rctx);
 void evergreen_pipe_set_buffer_resource(struct r600_pipe_context *rctx,
@@ -217,6 +218,7 @@ void r600_spi_update(struct r600_pipe_context *rctx);
 void r600_init_config(struct r600_pipe_context *rctx);
 void r600_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shader);
 void r600_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shader);
+void r600_fetch_shader(struct r600_vertex_element *ve);
 void *r600_create_db_flush_dsa(struct r600_pipe_context *rctx);
 void r600_polygon_offset_update(struct r600_pipe_context *rctx);
 void r600_pipe_set_buffer_resource(struct r600_pipe_context *rctx,

diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index 170f96be9366a34c2da635fedf3dc13e27f48334..f1e21bceaddafa1ddd48972e0a0ea8f85c61031e 100644 (file)
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -1366,6 +1366,22 @@ void r600_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shad
                                0xFFFFFFFF, NULL);
 }
 
+void r600_fetch_shader(struct r600_vertex_element *ve)
+{
+       struct r600_pipe_state *rstate;
+
+       rstate = &ve->rstate;
+       rstate->id = R600_PIPE_STATE_FETCH_SHADER;
+       rstate->nregs = 0;
+       r600_pipe_state_add_reg(rstate, R_0288A4_SQ_PGM_RESOURCES_FS,
+                               0x00000000, 0xFFFFFFFF, NULL);
+       r600_pipe_state_add_reg(rstate, R_0288DC_SQ_PGM_CF_OFFSET_FS,
+                               0x00000000, 0xFFFFFFFF, NULL);
+       r600_pipe_state_add_reg(rstate, R_028894_SQ_PGM_START_FS,
+                               r600_bo_offset(ve->fetch_shader) >> 8,
+                               0xFFFFFFFF, ve->fetch_shader);
+}
+
 void *r600_create_db_flush_dsa(struct r600_pipe_context *rctx)
 {
        struct pipe_depth_stencil_alpha_state dsa;