decode->sc_coeff_size = 0;
decode->sw_ctxt_size = RDECODE_SESSION_CONTEXT_SIZE;
- decode->db_pitch = (((struct si_screen*)dec->screen)->info.family >= CHIP_ARCTURUS &&
+ decode->db_pitch = (((struct si_screen*)dec->screen)->info.family >= CHIP_RENOIR &&
dec->base.width > 32 && dec->stream_type == RDECODE_CODEC_VP9) ?
align(dec->base.width, 64) :
align(dec->base.width, 32) ;
/* default probability + probability data */
ctx_size = 2304 * 5;
- if (((struct si_screen*)dec->screen)->info.family >= CHIP_ARCTURUS) {
+ if (((struct si_screen*)dec->screen)->info.family >= CHIP_RENOIR) {
/* SRE collocated context data */
ctx_size += 32 * 2 * 128 * 68;
/* SMP collocated context data */
case PIPE_VIDEO_FORMAT_VP9:
max_references = MAX2(max_references, 9);
- dpb_size = (((struct si_screen*)dec->screen)->info.family >= CHIP_ARCTURUS) ?
+ dpb_size = (((struct si_screen*)dec->screen)->info.family >= CHIP_RENOIR) ?
(8192 * 4320 * 3 / 2) * max_references :
(4096 * 3000 * 3 / 2) * max_references;
dec->reg.data1 = RDECODE_VCN2_5_GPCOM_VCPU_DATA1;
dec->reg.cmd = RDECODE_VCN2_5_GPCOM_VCPU_CMD;
dec->reg.cntl = RDECODE_VCN2_5_ENGINE_CNTL;
- } else if (sctx->family >= CHIP_NAVI10) {
+ } else if (sctx->family >= CHIP_NAVI10 || sctx->family == CHIP_RENOIR) {
dec->reg.data0 = RDECODE_VCN2_GPCOM_VCPU_DATA0;
dec->reg.data1 = RDECODE_VCN2_GPCOM_VCPU_DATA1;
dec->reg.cmd = RDECODE_VCN2_GPCOM_VCPU_CMD;