ac,radv: add ac_gpu_info::has_double_rate_fp16

Only GFX9+ support double rate packed math instructions.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4453>

diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index 47433ed26f5fd74df3558a033d8e1dfcc7eed174..92148597b51d8b1bd0e5865bab2616db5a946a98 100644 (file)
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -590,6 +590,9 @@ bool ac_query_gpu_info(int fd, void *dev_p,
        info->has_out_of_order_rast = info->chip_class >= GFX8 &&
                                      info->max_se >= 2;
 
+       /* Whether chips support double rate packed math instructions. */
+       info->has_double_rate_fp16 = info->chip_class >= GFX9;
+
        /* TODO: Figure out how to use LOAD_CONTEXT_REG on GFX6-GFX7. */
        info->has_load_ctx_reg_pkt = info->chip_class >= GFX9 ||
                                     (info->chip_class >= GFX8 &&

diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h
index 20a2f79eb63ee5ceb2c126b9fa56d8fa7e456ed5..a728a505627455435e1bfe18d5177711f4cf84f4 100644 (file)
--- a/src/amd/common/ac_gpu_info.h
+++ b/src/amd/common/ac_gpu_info.h
@@ -66,6 +66,7 @@ struct radeon_info {
        bool                        rbplus_allowed; /* if RB+ is allowed */
        bool                        has_load_ctx_reg_pkt;
        bool                        has_out_of_order_rast;
+       bool                        has_double_rate_fp16;
        bool                        cpdma_prefetch_writes_memory;
        bool                        has_gfx9_scissor_bug;
        bool                        has_tc_compat_zrange_bug;

diff --git a/src/amd/vulkan/radv_extensions.py b/src/amd/vulkan/radv_extensions.py
index b2878333d669ed2925e4b941298b3e0ec30f4b26..55f3d2b6e3772f7e59c475dfa42670c8c2ccd852 100644 (file)
--- a/src/amd/vulkan/radv_extensions.py
+++ b/src/amd/vulkan/radv_extensions.py
@@ -155,8 +155,8 @@ EXTENSIONS = [
     Extension('VK_AMD_device_coherent_memory',            1, True),
     Extension('VK_AMD_draw_indirect_count',               1, True),
     Extension('VK_AMD_gcn_shader',                        1, True),
-    Extension('VK_AMD_gpu_shader_half_float',             1, '!device->use_aco && device->rad_info.chip_class >= GFX9'),
-    Extension('VK_AMD_gpu_shader_int16',                  1, '!device->use_aco && device->rad_info.chip_class >= GFX9'),
+    Extension('VK_AMD_gpu_shader_half_float',             1, '!device->use_aco && device->rad_info.has_double_rate_fp16'),
+    Extension('VK_AMD_gpu_shader_int16',                  1, '!device->use_aco && device->rad_info.has_double_rate_fp16'),
     # Disable mixed attachment samples on GFX6-GFX7 until the CTS failures have been resolved.
     Extension('VK_AMD_mixed_attachment_samples',          1, 'device->rad_info.chip_class >= GFX8'),
     Extension('VK_AMD_rasterization_order',               1, 'device->rad_info.has_out_of_order_rast'),