freedreno: On a5xx+ INDX_SIZE is MAX_INDICES

This was already done correctly for the indirect variants, and turnip
was setting the correct value, but it seems freedreno missed the change
in the non-indirect variant. Also, fix a misspelling of "indices" and
add a type to INDX_SIZE.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5644>

diff --git a/src/freedreno/registers/adreno_pm4.xml b/src/freedreno/registers/adreno_pm4.xml
index 0832891912cf29e6915d18f8484ee20889c30f72..1718400aef745335d943ccf7f7139630393782ca 100644 (file)
--- a/src/freedreno/registers/adreno_pm4.xml
+++ b/src/freedreno/registers/adreno_pm4.xml
@@ -709,7 +709,8 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords)
                </reg32>
                <reg64 offset="4" name="INDX_BASE" type="address"/>
                <reg32 offset="6" name="6">
-                       <bitfield name="INDX_SIZE" low="0" high="31"/>
+                       <!-- max # of elements in index buffer -->
+                       <bitfield name="MAX_INDICES" low="0" high="31"/>
                </reg32>
        </stripe>
 
@@ -718,7 +719,7 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords)
        </reg32>
 
        <reg32 offset="5" name="5">
-               <bitfield name="INDX_SIZE" low="0" high="31"/>
+               <bitfield name="INDX_SIZE" low="0" high="31" type="uint"/>
        </reg32>
 </domain>
 

diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_draw.h b/src/gallium/drivers/freedreno/a4xx/fd4_draw.h
index 64ccd5cc9dea7bb3913f60de5b405583c7a59369..57aabf529d124f195c98c83e7527369dae30e1f4 100644 (file)
--- a/src/gallium/drivers/freedreno/a4xx/fd4_draw.h
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_draw.h
@@ -51,7 +51,7 @@ fd4_draw(struct fd_batch *batch, struct fd_ringbuffer *ring,
                enum pc_di_vis_cull_mode vismode,
                enum pc_di_src_sel src_sel, uint32_t count,
                uint32_t instances, enum a4xx_index_size idx_type,
-               uint32_t idx_size, uint32_t idx_offset,
+               uint32_t max_indices, uint32_t idx_offset,
                struct pipe_resource *idx_buffer)
 {
        /* for debug after a lock up, write a unique counter value
@@ -77,7 +77,7 @@ fd4_draw(struct fd_batch *batch, struct fd_ringbuffer *ring,
        if (idx_buffer) {
                OUT_RING(ring, 0x0);           /* XXX */
                OUT_RELOC(ring, fd_resource(idx_buffer)->bo, idx_offset, 0, 0);
-               OUT_RING (ring, idx_size);
+               OUT_RING (ring, max_indices);
        }
 
        emit_marker(ring, 7);

diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_draw.h b/src/gallium/drivers/freedreno/a5xx/fd5_draw.h
index 119ecd4d3adf08b797cffccbf927939ab928f151..2dfd95304af50c345fab6a19a77ce1f1ec22a220 100644 (file)
--- a/src/gallium/drivers/freedreno/a5xx/fd5_draw.h
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_draw.h
@@ -45,7 +45,7 @@ fd5_draw(struct fd_batch *batch, struct fd_ringbuffer *ring,
                enum pc_di_vis_cull_mode vismode,
                enum pc_di_src_sel src_sel, uint32_t count,
                uint32_t instances, enum a4xx_index_size idx_type,
-               uint32_t idx_size, uint32_t idx_offset,
+               uint32_t max_indices, uint32_t idx_offset,
                struct pipe_resource *idx_buffer)
 {
        /* for debug after a lock up, write a unique counter value
@@ -71,7 +71,7 @@ fd5_draw(struct fd_batch *batch, struct fd_ringbuffer *ring,
        if (idx_buffer) {
                OUT_RING(ring, 0x0);           /* XXX */
                OUT_RELOC(ring, fd_resource(idx_buffer)->bo, idx_offset, 0, 0);
-               OUT_RING (ring, idx_size);
+               OUT_RING (ring, max_indices);
        }
 
        emit_marker5(ring, 7);
@@ -89,7 +89,7 @@ fd5_draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring,
        struct pipe_resource *idx_buffer = NULL;
        enum a4xx_index_size idx_type;
        enum pc_di_src_sel src_sel;
-       uint32_t idx_size, idx_offset;
+       uint32_t max_indices, idx_offset;
 
        if (info->indirect) {
                struct fd_resource *ind = fd_resource(info->indirect->buffer);
@@ -98,7 +98,7 @@ fd5_draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring,
 
                if (info->index_size) {
                        struct pipe_resource *idx = info->index.resource;
-                       unsigned max_indicies = idx->width0 / info->index_size;
+                       max_indices = idx->width0 / info->index_size;
 
                        OUT_PKT7(ring, CP_DRAW_INDX_INDIRECT, 6);
                        OUT_RINGP(ring, DRAW4(primtype, DI_SRC_SEL_DMA,
@@ -106,7 +106,7 @@ fd5_draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring,
                                        &batch->draw_patches);
                        OUT_RELOC(ring, fd_resource(idx)->bo,
                                        index_offset, 0, 0);
-                       OUT_RING(ring, A5XX_CP_DRAW_INDX_INDIRECT_3_MAX_INDICES(max_indicies));
+                       OUT_RING(ring, A5XX_CP_DRAW_INDX_INDIRECT_3_MAX_INDICES(max_indices));
                        OUT_RELOC(ring, ind->bo, info->indirect->offset, 0, 0);
                } else {
                        OUT_PKT7(ring, CP_DRAW_INDIRECT, 3);
@@ -126,20 +126,20 @@ fd5_draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring,
 
                idx_buffer = info->index.resource;
                idx_type = fd4_size2indextype(info->index_size);
-               idx_size = info->index_size * info->count;
+               max_indices = idx_buffer->width0 / info->index_size;
                idx_offset = index_offset + info->start * info->index_size;
                src_sel = DI_SRC_SEL_DMA;
        } else {
                idx_buffer = NULL;
                idx_type = INDEX4_SIZE_32_BIT;
-               idx_size = 0;
+               max_indices = 0;
                idx_offset = 0;
                src_sel = DI_SRC_SEL_AUTO_INDEX;
        }
 
        fd5_draw(batch, ring, primtype, vismode, src_sel,
                        info->count, info->instance_count,
-                       idx_type, idx_size, idx_offset, idx_buffer);
+                       idx_type, max_indices, idx_offset, idx_buffer);
 }
 
 #endif /* FD5_DRAW_H_ */

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
index e2b384d4cb13acbe981778dd577519f0410bf8dc..fbad52204a7adf171689eb575dfcb0a3e8997fa1 100644 (file)
--- a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
@@ -53,13 +53,13 @@ draw_emit_indirect(struct fd_ringbuffer *ring,
 
        if (info->index_size) {
                struct pipe_resource *idx = info->index.resource;
-               unsigned max_indicies = (idx->width0 - index_offset) / info->index_size;
+               unsigned max_indices = (idx->width0 - index_offset) / info->index_size;
 
                OUT_PKT(ring, CP_DRAW_INDX_INDIRECT,
                                pack_CP_DRAW_INDX_OFFSET_0(*draw0),
                                A5XX_CP_DRAW_INDX_INDIRECT_INDX_BASE(
                                                fd_resource(idx)->bo, index_offset),
-                               A5XX_CP_DRAW_INDX_INDIRECT_3(.max_indices = max_indicies),
+                               A5XX_CP_DRAW_INDX_INDIRECT_3(.max_indices = max_indices),
                                A5XX_CP_DRAW_INDX_INDIRECT_INDIRECT(
                                                ind->bo, info->indirect->offset)
                        );
@@ -82,8 +82,8 @@ draw_emit(struct fd_ringbuffer *ring,
                assert(!info->has_user_indices);
 
                struct pipe_resource *idx_buffer = info->index.resource;
-               uint32_t idx_size = idx_buffer->width0 - index_offset;
                uint32_t idx_offset = index_offset + info->start * info->index_size;
+               unsigned max_indices = (idx_buffer->width0 - index_offset) / info->index_size;
 
                OUT_PKT(ring, CP_DRAW_INDX_OFFSET,
                                pack_CP_DRAW_INDX_OFFSET_0(*draw0),
@@ -92,7 +92,7 @@ draw_emit(struct fd_ringbuffer *ring,
                                CP_DRAW_INDX_OFFSET_3(0),
                                A5XX_CP_DRAW_INDX_OFFSET_INDX_BASE(
                                                fd_resource(idx_buffer)->bo, idx_offset),
-                               A5XX_CP_DRAW_INDX_OFFSET_6(.indx_size = idx_size)
+                               A5XX_CP_DRAW_INDX_OFFSET_6(.max_indices = max_indices)
                        );
        } else {
                OUT_PKT(ring, CP_DRAW_INDX_OFFSET,