+2014-01-27 Steve Ellcey <sellcey@mips.com>
+
+ * common/config/mips/mips-common.c (TARGET_DEFAULT_TARGET_FLAGS):
+ Remove TARGET_FP_EXCEPTIONS_DEFAULT and MASK_FUSED_MADD.
+ * config/mips/mips.c (mips_option_override): Change setting
+ of TARGET_DSP.
+ * config/mips/mips.h (TARGET_FP_EXCEPTIONS_DEFAULT): Remove.
+ * config/mips/mips.opt (DSP, DSPR2, FP_EXCEPTIONS, FUSED_MADD,
+ MIPS3D) Change from Mask to Var.
+
2014-01-27 Jeff Law <law@redhat.com>
* ipa-inline.c (inline_small_functions): Fix typo.
(TARGET_DEFAULT \
| TARGET_CPU_DEFAULT \
| TARGET_ENDIAN_DEFAULT \
- | TARGET_FP_EXCEPTIONS_DEFAULT \
- | MASK_CHECK_ZERO_DIV \
- | MASK_FUSED_MADD)
+ | MASK_CHECK_ZERO_DIV)
#undef TARGET_HANDLE_OPTION
#define TARGET_HANDLE_OPTION mips_handle_option
mips_r10k_cache_barrier = R10K_CACHE_BARRIER_NONE;
}
- /* If TARGET_DSPR2, enable MASK_DSP. */
+ /* If TARGET_DSPR2, enable TARGET_DSP. */
if (TARGET_DSPR2)
- target_flags |= MASK_DSP;
+ TARGET_DSP = true;
/* .eh_frame addresses should be the same width as a C pointer.
Most MIPS ABIs support only one pointer size, so the assembler
#define TARGET_ENDIAN_DEFAULT MASK_BIG_ENDIAN
#endif
-#ifndef TARGET_FP_EXCEPTIONS_DEFAULT
-#define TARGET_FP_EXCEPTIONS_DEFAULT MASK_FP_EXCEPTIONS
-#endif
-
#ifdef IN_LIBGCC2
#undef TARGET_64BIT
/* Make this compile time constant for libgcc2 */
Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations
mdsp
-Target Report Mask(DSP)
+Target Report Var(TARGET_DSP)
Use MIPS-DSP instructions
mdspr2
-Target Report Mask(DSPR2)
+Target Report Var(TARGET_DSPR2)
Use MIPS-DSP REV 2 instructions
mdebug
Work around an early 4300 hardware bug
mfp-exceptions
-Target Report Mask(FP_EXCEPTIONS)
+Target Report Var(TARGET_FP_EXCEPTIONS) Init(1)
FP exceptions are enabled
mfp32
-mflush-func=FUNC Use FUNC to flush the cache before calling stack trampolines
mfused-madd
-Target Report Mask(FUSED_MADD)
+Target Report Var(TARGET_FUSED_MADD) Init(1)
Generate floating-point multiply-add instructions
mabs=
Generate MIPS16 code
mips3d
-Target Report RejectNegative Mask(MIPS3D)
+Target Report RejectNegative Var(TARGET_MIPS3D)
Use MIPS-3D instructions
mllsc
Generate normal-mode code
mno-mips3d
-Target Report RejectNegative InverseMask(MIPS3D)
+Target Report RejectNegative Var(TARGET_MIPS3D, 0)
Do not use MIPS-3D instructions
mpaired-single