dev: Clarify why updates are delayed when the MC14818 is activated

diff --git a/src/dev/mc146818.cc b/src/dev/mc146818.cc
index abacd8742403cd7d7602036f850bfff3cae190c7..81366b774919098fe098b3aa13f0a8b5104bdc0a 100644 (file)
--- a/src/dev/mc146818.cc
+++ b/src/dev/mc146818.cc
@@ -163,8 +163,10 @@ MC146818::writeData(const uint8_t addr, const uint8_t data)
                   if (tickEvent.scheduled())
                       deschedule(tickEvent);
               } else if (rega_dv_disabled(old_rega))  {
-                  // If the divider chain goes from reset to active, we
-                  // need to schedule a tick after precisely 0.5s.
+                  // According to the specification, the next tick
+                  // happens after 0.5s when the divider chain goes
+                  // from reset to active. So, we simply schedule the
+                  // tick after 0.5s.
                   assert(!tickEvent.scheduled());
                   schedule(tickEvent, curTick() + SimClock::Int::s / 2);
               }