Tim Tucker contributed support for the Gould NP1 and Gould Powernode.
Pace Willison contributed Intel 386 support.
Jay Vosburgh contributed Symmetry support.
+Marko Mlinar contributed OpenRISC 1000 support.
Andreas Schwab contributed M68K @sc{gnu}/Linux support.
* M68K:: Motorola M68K
@c OBSOLETE * M88K:: Motorola M88K
* MIPS Embedded:: MIPS Embedded
+* OpenRISC 1000:: OpenRisc 1000
* PA:: HP PA Embedded
* PowerPC: PowerPC
* SH:: Hitachi SH
to run before stopping.
@end table
+@node OpenRISC 1000
+@subsection OpenRISC 1000
+@cindex OpenRISC 1000
+
+@cindex or1k boards
+See OR1k Architecture document (@uref{www.opencores.org}) for more information
+about platform and commands.
+
+@table @code
+
+@kindex target jtag
+@item target jtag jtag://@var{host}:@var{port}
+
+Connects to remote JTAG server.
+JTAG remote server can be either an or1ksim or JTAG server,
+connected via parallel port to the board.
+
+Example: @code{target jtag jtag://localhost:9999}
+
+@kindex or1ksim
+@item or1ksim @var{command}
+If connected to @code{or1ksim} OpenRISC 1000 Architectural
+Simulator, proprietary commands can be executed.
+
+@kindex info or1k spr
+@item info or1k spr
+Displays spr groups.
+
+@item info or1k spr @var{group}
+@itemx info or1k spr @var{groupno}
+Displays register names in selected group.
+
+@item info or1k spr @var{group} @var{register}
+@itemx info or1k spr @var{register}
+@itemx info or1k spr @var{groupno} @var{registerno}
+@itemx info or1k spr @var{registerno}
+Shows information about specified spr register.
+
+@kindex spr
+@item spr @var{group} @var{register} @var{value}
+@itemx spr @var{register @var{value}}
+@itemx spr @var{groupno} @var{registerno @var{value}}
+@itemx spr @var{registerno @var{value}}
+Writes @var{value} to specified spr register.
+@end table
+
+Some implementations of OpenRISC 1000 Architecture also have hardware trace.
+It is very similar to @value{GDBN} trace, except it does not interfere with normal
+program execution and is thus much faster. Hardware breakpoints/watchpoint
+triggers can be set using:
+@table @code
+@item $LEA/$LDATA
+Load effective address/data
+@item $SEA/$SDATA
+Store effective address/data
+@item $AEA/$ADATA
+Access effective address ($SEA or $LEA) or data ($SDATA/$LDATA)
+@item $FETCH
+Fetch data
+@end table
+
+When triggered, it can capture low level data, like: @code{PC}, @code{LSEA},
+@code{LDATA}, @code{SDATA}, @code{READSPR}, @code{WRITESPR}, @code{INSTR}.
+
+@code{htrace} commands:
+@cindex OpenRISC 1000 htrace
+@table @code
+@kindex hwatch
+@item hwatch @var{conditional}
+Set hardware watchpoint on combination of Load/Store Effecive Address(es)
+or Data. For example:
+
+@code{hwatch ($LEA == my_var) && ($LDATA < 50) || ($SEA == my_var) && ($SDATA >= 50)}
+
+@code{hwatch ($LEA == my_var) && ($LDATA < 50) || ($SEA == my_var) && ($SDATA >= 50)}
+
+@kindex htrace info
+@item htrace info
+Display information about current HW trace configuration.
+
+@kindex htrace trigger
+@item htrace trigger @var{conditional}
+Set starting criteria for HW trace.
+
+@kindex htrace qualifier
+@item htrace qualifier @var{conditional}
+Set acquisition qualifier for HW trace.
+
+@kindex htrace stop
+@item htrace stop @var{conditional}
+Set HW trace stopping criteria.
+
+@kindex htrace record
+@item htrace record @var{[data]*}
+Selects the data to be recorded, when qualifier is met and HW trace was
+triggered.
+
+@kindex htrace enable
+@item htrace enable
+@kindex htrace disable
+@itemx htrace disable
+Enables/disables the HW trace.
+
+@kindex htrace rewind
+@item htrace rewind @var{[filename]}
+Clears currently recorded trace data.
+
+If filename is specified, new trace file is made and any newly collected data
+will be written there.
+
+@kindex htrace print
+@item htrace print @var{[start [len]]}
+Prints trace buffer, using current record configuration.
+
+@kindex htrace mode continuous
+@item htrace mode continuous
+Set continuous trace mode.
+
+@kindex htrace mode suspend
+@item htrace mode suspend
+Set suspend trace mode.
+
+@end table
+
@node PowerPC
@subsection PowerPC