Fix previous change: {add,sub}qw should be {add,sub}ql.

Fix previous change: {add,sub}qw should be {add,sub}ql. For other uses
of {add,sub}q don't check for address register and always use
{add,sub}ql.

From-SVN: r13523

diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
index 2f0201c5ccbc278a7da15d8052678ac7dc84bc27..2244adff18b2866afad4085329781143eba7132c 100644 (file)
--- a/gcc/config/m68k/m68k.md
+++ b/gcc/config/m68k/m68k.md
@@ -2154,21 +2154,17 @@
 #ifndef NO_ADDSUB_Q
       if (INTVAL (operands[2]) > 0
          && INTVAL (operands[2]) <= 8)
-       return (ADDRESS_REG_P (operands[0]) && !TARGET_5200
-               ? \"addq%.w %2,%0\"
-               : \"addq%.l %2,%0\");
+       return \"addq%.l %2,%0\";
       if (INTVAL (operands[2]) < 0
          && INTVAL (operands[2]) >= -8)
         {
          operands[2] = gen_rtx (CONST_INT, VOIDmode,
                                 - INTVAL (operands[2]));
-         return (ADDRESS_REG_P (operands[0]) && !TARGET_5200
-                 ? \"subq%.w %2,%0\"
-                 : \"subq%.l %2,%0\");
+         return \"subq%.l %2,%0\";
        }
-      /* On the CPU32 it is faster to use two addqw instructions to
+      /* On the CPU32 it is faster to use two addql instructions to
         add a small integer (8 < N <= 16) to a register.
-        Likewise for subqw. */
+        Likewise for subql. */
       if (TARGET_CPU32 && REG_P (operands[0]))
        {
          if (INTVAL (operands[2]) > 8
@@ -2176,14 +2172,14 @@
            {
              operands[2] = gen_rtx (CONST_INT, VOIDmode, 
                                      INTVAL (operands[2]) - 8);
-             return \"addq%.w %#8,%0\;addq%.w %2,%0\";
+             return \"addq%.l %#8,%0\;addq%.l %2,%0\";
            }
          if (INTVAL (operands[2]) < -8
              && INTVAL (operands[2]) >= -16)
            {
              operands[2] = gen_rtx (CONST_INT, VOIDmode,
                                      - INTVAL (operands[2]) - 8);
-             return \"subq%.w %#8,%0\;subq%.w %2,%0\";
+             return \"subq%.l %#8,%0\;subq%.l %2,%0\";
            }
        }
 #endif