Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
struct r600_atom msaa_config;
int ps_iter_samples;
- unsigned default_ps_gprs, default_vs_gprs;
-
/* Vertex and index buffers. */
bool vertex_buffers_dirty;
struct pipe_index_buffer index_buffer;
/* alpha */
if (state->alpha.enabled) {
dsa->alpha_func = state->alpha.func;
- dsa->alpha_ref = state->alpha.ref_value;
si_pm4_set_reg(pm4, R_00B030_SPI_SHADER_USER_DATA_PS_0 +
- SI_SGPR_ALPHA_REF * 4, fui(dsa->alpha_ref));
+ SI_SGPR_ALPHA_REF * 4, fui(state->alpha.ref_value));
} else {
dsa->alpha_func = PIPE_FUNC_ALWAYS;
}
unsigned pa_sc_line_stipple;
unsigned pa_su_sc_mode_cntl;
unsigned pa_cl_clip_cntl;
- unsigned pa_cl_vs_out_cntl;
unsigned clip_plane_enable;
float offset_units;
float offset_scale;
struct si_state_dsa {
struct si_pm4_state pm4;
- float alpha_ref;
unsigned alpha_func;
uint8_t valuemask[2];
uint8_t writemask[2];