+2018-10-08 Martin Liska <mliska@suse.cz>
+
+ * gcc.target/i386/i386.exp: Move procedures to
+ target-supports.exp.
+ * g++.target/i386/i386.exp: New file.
+ * gcc.target/i386/mv*.C: Move here tests and remove
+ target filter in these tests.
+
2018-10-08 Cesar Philippidis <cesar@codesourcery.com>
* gfortran.dg/contiguous_4.f90: Adjust.
+++ /dev/null
-/* Test case to check if Multiversioning works. */
-/* { dg-do run { target i?86-*-* x86_64-*-* } } */
-/* { dg-require-ifunc "" } */
-/* { dg-options "-O2 -fPIC" } */
-
-#include <assert.h>
-
-/* Default version. */
-int foo (); // Extra declaration that is merged with the second one.
-int foo () __attribute__ ((target("default")));
-/* The other versions of foo. Mix up the ordering and
- check if the dispatching does it in the order of priority. */
-/* Check combination of target attributes. */
-int foo () __attribute__ ((target("arch=corei7,popcnt")));
-/* The target operands in this declaration and the definition are re-ordered.
- This should still work. */
-int foo () __attribute__ ((target("ssse3,avx2")));
-
-/* Check for all target attributes for which dispatchers are available. */
-/* Check arch= */
-int foo () __attribute__((target("arch=core2")));
-int foo () __attribute__((target("arch=corei7")));
-int foo () __attribute__((target("arch=atom")));
-/* Check ISAs */
-int foo () __attribute__((target("avx")));
-int foo () __attribute__ ((target("arch=core2,sse4.2")));
-/* Check more arch=. */
-int foo () __attribute__((target("arch=amdfam10")));
-int foo () __attribute__((target("arch=bdver1")));
-int foo () __attribute__((target("arch=bdver2")));
-
-int (*p)() = &foo;
-int main ()
-{
- int val = foo ();
- assert (val == (*p)());
-
- /* Check in the exact same order in which the dispatching
- is expected to happen. */
- if (__builtin_cpu_is ("bdver1"))
- assert (val == 1);
- else if (__builtin_cpu_is ("bdver2"))
- assert (val == 2);
- else if (__builtin_cpu_supports ("avx2")
- && __builtin_cpu_supports ("ssse3"))
- assert (val == 3);
- else if (__builtin_cpu_supports ("avx"))
- assert (val == 4);
- else if (__builtin_cpu_is ("corei7")
- && __builtin_cpu_supports ("popcnt"))
- assert (val == 5);
- else if (__builtin_cpu_is ("corei7"))
- assert (val == 6);
- else if (__builtin_cpu_is ("amdfam10h"))
- assert (val == 7);
- else if (__builtin_cpu_is ("core2")
- && __builtin_cpu_supports ("sse4.2"))
- assert (val == 8);
- else if (__builtin_cpu_is ("core2"))
- assert (val == 9);
- else if (__builtin_cpu_is ("atom"))
- assert (val == 10);
- else
- assert (val == 0);
-
- return 0;
-}
-
-int __attribute__ ((target("default")))
-foo ()
-{
- return 0;
-}
-
-int __attribute__ ((target("arch=corei7,popcnt")))
-foo ()
-{
- return 5;
-}
-int __attribute__ ((target("avx2,ssse3")))
-foo ()
-{
- return 3;
-}
-
-int __attribute__ ((target("arch=core2")))
-foo ()
-{
- return 9;
-}
-
-int __attribute__ ((target("arch=corei7")))
-foo ()
-{
- return 6;
-}
-
-int __attribute__ ((target("arch=atom")))
-foo ()
-{
- return 10;
-}
-
-int __attribute__ ((target("avx")))
-foo ()
-{
- return 4;
-}
-
-int __attribute__ ((target("arch=core2,sse4.2")))
-foo ()
-{
- return 8;
-}
-
-int __attribute__ ((target("arch=amdfam10")))
-foo ()
-{
- return 7;
-}
-
-int __attribute__ ((target("arch=bdver1")))
-foo ()
-{
- return 1;
-}
-
-int __attribute__ ((target("arch=bdver2")))
-foo ()
-{
- return 2;
-}
+++ /dev/null
-// { dg-do assemble { target i?86-*-* x86_64-*-* } }
-// { dg-options "" }
-
-__attribute__((target ("popcnt"), used))
-void foo (void)
-{
-}
-
-__attribute__((target ("popcnt","avx"), used))
-void foo (void)
-{
-}
+++ /dev/null
-// { dg-do compile { target i?86-*-* x86_64-*-* } }
-// { dg-options "-msse2" }
-
-int foo () __attribute__ ((target("default")));
-int foo () __attribute__ ((target("sse2")));
-
-int
-main ()
-{
- return foo ();
-}
-
-int __attribute__ ((target("default")))
-foo ()
-{
- return 0;
-}
-
-int __attribute__ ((target("sse2")))
-foo ()
-{
- return 0;
-}
+++ /dev/null
-// Test case to check if multiversioning works as expected when the versions
-// are defined in different files. Auxiliary file for mv12.C.
-
-#include "mv12.h"
-
-__attribute__ ((target ("sse4.2")))
-int foo ()
-{
- return 1;
-}
+++ /dev/null
-// Test case to check if multiversioning works as expected when the versions
-// are defined in different files.
-
-// { dg-do run { target i?86-*-* x86_64-*-* } }
-// { dg-require-ifunc "" }
-// { dg-options "-O2" }
-// { dg-additional-sources "mv12-aux.cc" }
-
-#include "mv12.h"
-
-int main ()
-{
- if (__builtin_cpu_supports ("sse4.2"))
- return foo () - 1;
- return foo ();
-}
-
-__attribute__ ((target ("default")))
-int foo ()
-{
- return 0;
-}
+++ /dev/null
-// Header file used by mv12.C and mv12-aux.cc.
-
-int foo () __attribute__ ((target ("default")));
-int foo () __attribute__ ((target ("sse4.2")));
+++ /dev/null
-// Test case to check if multiversioning functions that are extern "C"
-// generates errors.
-
-// { dg-do compile { target i?86-*-* x86_64-*-* } }
-
-extern "C"
-__attribute__ ((target ("default")))
-int foo () // { dg-message "previously defined here" }
-{
- return 0;
-}
-
-extern "C"
-__attribute__ ((target ("sse4.2")))
-int foo () // { dg-error "redefinition" }
-{
- return 1;
-}
+++ /dev/null
-/* Test case to check if Multiversioning works. */
-/* { dg-do run { target i?86-*-* x86_64-*-* } } */
-/* { dg-require-ifunc "" } */
-/* { dg-options "-O2 -fPIC -march=x86-64" } */
-
-#include <assert.h>
-
-/* Default version. */
-int foo (); // Extra declaration that is merged with the second one.
-int foo () __attribute__ ((target("default")));
-
-int foo () __attribute__ ((target("arch=corei7")));
-
-int (*p)() = &foo;
-int main ()
-{
- int val = foo ();
- assert (val == (*p)());
-
- /* Check in the exact same order in which the dispatching
- is expected to happen. */
- if (__builtin_cpu_is ("corei7"))
- assert (val == 5);
- else
- assert (val == 0);
-
- return 0;
-}
-
-int __attribute__ ((target("default")))
-foo ()
-{
- return 0;
-}
-
-int __attribute__ ((target("arch=corei7")))
-foo ()
-{
- return 5;
-}
+++ /dev/null
-/* Test case to check if Multiversioning works. */
-/* { dg-do run { target i?86-*-* x86_64-*-* } } */
-/* { dg-require-ifunc "" } */
-/* { dg-options "-O2 -fPIC -march=x86-64" } */
-
-#include <assert.h>
-
-/* Default version. */
-int foo (); // Extra declaration that is merged with the second one.
-int foo () __attribute__ ((target("default")));
-
-int foo () __attribute__ ((target("arch=nehalem")));
-
-int (*p)() = &foo;
-int main ()
-{
- int val = foo ();
- assert (val == (*p)());
-
- /* Check in the exact same order in which the dispatching
- is expected to happen. */
- if (__builtin_cpu_is ("corei7"))
- assert (val == 5);
- else
- assert (val == 0);
-
- return 0;
-}
-
-int __attribute__ ((target("default")))
-foo ()
-{
- return 0;
-}
-
-int __attribute__ ((target("arch=nehalem")))
-foo ()
-{
- return 5;
-}
+++ /dev/null
-// Test that dispatching can choose the right multiversion
-// for Intel CPUs with the same internal GCC processor id
-// but slighly different sets of x86 extensions.
-
-// { dg-do run { target i?86-*-* x86_64-*-* } }
-// { dg-require-ifunc "" }
-// { dg-options "-O2" }
-
-#include <assert.h>
-
-int __attribute__ ((target("default")))
-foo ()
-{
- return 0;
-}
-
-int __attribute__ ((target("arch=nehalem")))
-foo ()
-{
- return 4;
-}
-
-int __attribute__ ((target("arch=westmere")))
-foo ()
-{
- return 5;
-}
-
-int __attribute__ ((target("arch=sandybridge")))
-foo ()
-{
- return 8;
-}
-
-int __attribute__ ((target("arch=ivybridge")))
-foo ()
-{
- return 9;
-}
-
-int __attribute__ ((target("arch=haswell")))
-foo ()
-{
- return 12;
-}
-
-int __attribute__ ((target("arch=broadwell"))) foo () {
- return 13;
-}
-
-int __attribute__ ((target("arch=skylake"))) foo () {
- return 14;
-}
-
-int __attribute__ ((target("arch=skylake-avx512"))) foo () {
- return 15;
-}
-
-int __attribute__ ((target("arch=cannonlake"))) foo () {
- return 16;
-}
-
-int __attribute__ ((target("arch=icelake-client"))) foo () {
- return 17;
-}
-
-int __attribute__ ((target("arch=icelake-server"))) foo () {
- return 18;
-}
-
-int main ()
-{
- int val = foo ();
-
- if (__builtin_cpu_is ("nehalem"))
- assert (val == 4);
- else if (__builtin_cpu_is ("westmere"))
- assert (val == 5);
- else if (__builtin_cpu_is ("sandybridge"))
- assert (val == 8);
- else if (__builtin_cpu_is ("ivybridge"))
- assert (val == 9);
- else if (__builtin_cpu_is ("haswell"))
- assert (val == 12);
- else if (__builtin_cpu_is ("broadwell"))
- assert (val == 13);
- else if (__builtin_cpu_is ("skylake"))
- assert (val == 14);
- else if (__builtin_cpu_is ("skylake-avx512"))
- assert (val == 15);
- else if (__builtin_cpu_is ("cannonlake"))
- assert (val == 16);
- else if (__builtin_cpu_is ("icelake-client"))
- assert (val == 17);
- else if (__builtin_cpu_is ("icelake-server"))
- assert (val == 18);
- else
- assert (val == 0);
-
- return 0;
-}
+++ /dev/null
-// Test case to check if Multiversioning works for BMI and BMI2.
-
-// { dg-do run { target i?86-*-* x86_64-*-* } }
-// { dg-require-ifunc "" }
-// { dg-options "-O2" }
-
-#include <assert.h>
-
-// Check BMI feature selection works
-int foo () __attribute__((target("default")));
-int foo () __attribute__((target("bmi")));
-int foo () __attribute__((target("bmi2")));
-
-// Check specialized versions for archs with BMI is chosen over generic BMI versions.
-int bar () __attribute__((target("default")));
-int bar () __attribute__((target("bmi")));
-int bar () __attribute__((target("bmi2")));
-int bar () __attribute__((target("arch=btver2")));
-int bar () __attribute__((target("arch=haswell")));
-
-int main ()
-{
- int val = foo ();
-
- if (__builtin_cpu_supports ("bmi2"))
- assert (val == 2);
- else if (__builtin_cpu_supports ("bmi"))
- assert (val == 1);
- else
- assert (val == 0);
-
- val = bar ();
-
- if (__builtin_cpu_is ("btver2"))
- assert (val == 5);
- else if (__builtin_cpu_is ("haswell"))
- assert (val == 6);
- else if (__builtin_cpu_supports ("bmi2"))
- assert (val == 2);
- else if (__builtin_cpu_supports ("bmi"))
- assert (val == 1);
- else
- assert (val == 0);
-
- return 0;
-}
-
-int __attribute__ ((target("default")))
-foo ()
-{
- return 0;
-}
-
-int __attribute__ ((target("bmi")))
-foo ()
-{
- return 1;
-}
-int __attribute__ ((target("bmi2")))
-foo ()
-{
- return 2;
-}
-
-int __attribute__ ((target("default")))
-bar ()
-{
- return 0;
-}
-
-int __attribute__ ((target("bmi")))
-bar ()
-{
- return 1;
-}
-int __attribute__ ((target("bmi2")))
-bar ()
-{
- return 2;
-}
-
-int __attribute__ ((target("arch=btver2")))
-bar ()
-{
- return 5;
-}
-
-int __attribute__ ((target("arch=haswell")))
-bar ()
-{
- return 6;
-}
-
+++ /dev/null
-/* Test case to check if Multiversioning works. */
-/* { dg-do run { target i?86-*-* x86_64-*-* } } */
-/* { dg-require-ifunc "" } */
-/* { dg-require-effective-target pie } */
-/* { dg-options "-O2 -fPIE -pie" } */
-
-#include "mv1.C"
+++ /dev/null
-/* Test case to check if Multiversioning works. */
-/* { dg-do run { target i?86-*-* x86_64-*-* } } */
-/* { dg-require-ifunc "" } */
-/* { dg-require-effective-target pie } */
-/* { dg-options "-O2 -fPIE -pie -march=x86-64" } */
-
-#include "mv14.C"
+++ /dev/null
-/* Test case to check if Multiversioning chooses the correct
- dispatching order when versions are for various ISAs. */
-/* { dg-do run { target i?86-*-* x86_64-*-* } } */
-/* { dg-require-ifunc "" } */
-/* { dg-options "-O2" } */
-
-#include <assert.h>
-
-/* Default version. */
-int foo () __attribute__ ((target ("default")));
-/* The dispatch checks should be in the exact reverse order of the
- declarations below. */
-int foo () __attribute__ ((target ("mmx")));
-int foo () __attribute__ ((target ("sse")));
-int foo () __attribute__ ((target ("sse2")));
-int foo () __attribute__ ((target ("sse3")));
-int foo () __attribute__ ((target ("ssse3")));
-int foo () __attribute__ ((target ("sse4.1")));
-int foo () __attribute__ ((target ("sse4.2")));
-int foo () __attribute__ ((target ("popcnt")));
-int foo () __attribute__ ((target ("avx")));
-int foo () __attribute__ ((target ("avx2")));
-int foo () __attribute__ ((target ("avx512f")));
-
-int main ()
-{
- int val = foo ();
-
- if (__builtin_cpu_supports ("avx512f"))
- assert (val == 11);
- else if (__builtin_cpu_supports ("avx2"))
- assert (val == 10);
- else if (__builtin_cpu_supports ("avx"))
- assert (val == 9);
- else if (__builtin_cpu_supports ("popcnt"))
- assert (val == 8);
- else if (__builtin_cpu_supports ("sse4.2"))
- assert (val == 7);
- else if (__builtin_cpu_supports ("sse4.1"))
- assert (val == 6);
- else if (__builtin_cpu_supports ("ssse3"))
- assert (val == 5);
- else if (__builtin_cpu_supports ("sse3"))
- assert (val == 4);
- else if (__builtin_cpu_supports ("sse2"))
- assert (val == 3);
- else if (__builtin_cpu_supports ("sse"))
- assert (val == 2);
- else if (__builtin_cpu_supports ("mmx"))
- assert (val == 1);
- else
- assert (val == 0);
-
- return 0;
-}
-
-int __attribute__ ((target("default")))
-foo ()
-{
- return 0;
-}
-
-int __attribute__ ((target("mmx")))
-foo ()
-{
- return 1;
-}
-
-int __attribute__ ((target("sse")))
-foo ()
-{
- return 2;
-}
-
-int __attribute__ ((target("sse2")))
-foo ()
-{
- return 3;
-}
-
-int __attribute__ ((target("sse3")))
-foo ()
-{
- return 4;
-}
-
-int __attribute__ ((target("ssse3")))
-foo ()
-{
- return 5;
-}
-
-int __attribute__ ((target("sse4.1")))
-foo ()
-{
- return 6;
-}
-
-int __attribute__ ((target("sse4.2")))
-foo ()
-{
- return 7;
-}
-
-int __attribute__ ((target("popcnt")))
-foo ()
-{
- return 8;
-}
-
-int __attribute__ ((target("avx")))
-foo ()
-{
- return 9;
-}
-
-int __attribute__ ((target("avx2")))
-foo ()
-{
- return 10;
-}
-
-int __attribute__ ((target("avx512f")))
-foo ()
-{
- return 11;
-}
+++ /dev/null
-/* Test case to check if Multiversioning works. */
-/* { dg-do run { target i?86-*-* x86_64-*-* } } */
-/* { dg-require-ifunc "" } */
-/* { dg-require-effective-target pie } */
-/* { dg-options "-O2 -fPIE -pie -march=x86-64" } */
-
-#include "mv15.C"
+++ /dev/null
-/* Test case to check if Multiversioning works. */
-/* { dg-do run { target i?86-*-* x86_64-*-* } } */
-/* { dg-require-ifunc "" } */
-/* { dg-require-effective-target static } */
-/* { dg-options "-O2 -static" } */
-
-#include "mv1.C"
+++ /dev/null
-/* Test case to check if Multiversioning works. */
-/* { dg-do run { target i?86-*-* x86_64-*-* } } */
-/* { dg-require-ifunc "" } */
-/* { dg-require-effective-target static } */
-/* { dg-options "-O2 -static -march=x86-64" } */
-
-#include "mv14.C"
+++ /dev/null
-/* Test case to check if Multiversioning works. */
-/* { dg-do run { target i?86-*-* x86_64-*-* } } */
-/* { dg-require-ifunc "" } */
-/* { dg-require-effective-target static } */
-/* { dg-options "-O2 -static -march=x86-64" } */
-
-#include "mv15.C"
+++ /dev/null
-// Test case to check if Multiversioning works for AES
-
-// { dg-do run { target i?86-*-* x86_64-*-* } }
-// { dg-require-ifunc "" }
-// { dg-options "-O2" }
-
-#include <assert.h>
-
-// Check if AES feature selection works
-int foo () __attribute__((target("default")));
-int foo () __attribute__((target("aes")));
-
-int main ()
-{
- int val = foo ();
-
- if (__builtin_cpu_supports ("aes"))
- assert (val == 1);
- else
- assert (val == 0);
-
- return 0;
-}
-
-int __attribute__ ((target("default")))
-foo ()
-{
- return 0;
-}
-
-int __attribute__ ((target("aes")))
-foo ()
-{
- return 1;
-}
+++ /dev/null
-// Test case to check if Multiversioning works for PCLMUL
-
-// { dg-do run { target i?86-*-* x86_64-*-* } }
-// { dg-require-ifunc "" }
-// { dg-options "-O2" }
-
-#include <assert.h>
-
-// Check if PCLMUL feature selection works
-int foo () __attribute__((target("default")));
-int foo () __attribute__((target("pclmul")));
-
-int main ()
-{
- int val = foo ();
-
- if (__builtin_cpu_supports ("pclmul"))
- assert (val == 1);
- else
- assert (val == 0);
-
- return 0;
-}
-
-int __attribute__ ((target("default")))
-foo ()
-{
- return 0;
-}
-
-int __attribute__ ((target("pclmul")))
-foo ()
-{
- return 1;
-}
+++ /dev/null
-// PR c++/84059
-// { dg-do compile { target i?86-*-* x86_64-*-* } }
-// { dg-require-ifunc "" }
-
-template <typename> struct a
-{
- int __attribute__ ((target ("arch=ivybridge"))) c (int) {return 1;}
- int __attribute__ ((target ("default"))) c (int) { return 2; }
-};
-void
-d ()
-{
- a<double> b;
- b.c (2);
-}
+++ /dev/null
-// PR c++/83911
-// { dg-do compile { target i?86-*-* x86_64-*-* } }
-// { dg-require-ifunc "" }
-
-class SimdFloat
-{
-public:
- __attribute__ ((target ("default")))
- SimdFloat(float x) {}
-
- __attribute__ ((target ("avx2")))
- SimdFloat(float x) {}
-};
-
-SimdFloat foo()
-{
- return 1;
-}
+++ /dev/null
-/* Test case to check if a call to a multiversioned function
- is replaced with a direct call to the particular version when
- the most specialized version's target attributes match the
- caller.
-
- In this program, foo is multiversioned but there is no default
- function. This is an error if the call has to go through a
- dispatcher. However, the call to foo in bar can be replaced
- with a direct call to the popcnt version of foo. Hence, this
- test should pass. */
-
-/* { dg-do run { target i?86-*-* x86_64-*-* } } */
-/* { dg-options "-O2" } */
-
-
-int __attribute__ ((target ("sse")))
-foo ()
-{
- return 1;
-}
-int __attribute__ ((target ("popcnt")))
-foo ()
-{
- return 0;
-}
-
-int __attribute__ ((target ("popcnt")))
-bar ()
-{
- return foo ();
-}
-
-int main ()
-{
- return bar ();
-}
+++ /dev/null
-/* Test case to check if the compiler generates an error message
- when the default version of a multiversioned function is absent
- and its pointer is taken. */
-
-/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
-/* { dg-require-ifunc "" } */
-/* { dg-options "-O2" } */
-
-int __attribute__ ((target ("sse")))
-foo ()
-{
- return 1;
-}
-int __attribute__ ((target ("popcnt")))
-foo ()
-{
- return 0;
-}
-
-int main ()
-{
- int (*p)() = &foo; /* { dg-error "use of multiversioned function without a default" {} } */
- return (*p)();
-}
+++ /dev/null
-/* Test case to check if multiversioned functions are still generated if they are
- marked comdat with inline keyword. */
-
-/* { dg-do run { target i?86-*-* x86_64-*-* } } */
-/* { dg-require-ifunc "" } */
-/* { dg-options "-O2" } */
-
-
-/* Default version. */
-inline int __attribute__ ((target ("default")))
-foo ()
-{
- return 0;
-}
-
-inline int __attribute__ ((target ("popcnt")))
-foo ()
-{
- return 0;
-}
-
-int main ()
-{
- return foo ();
-}
+++ /dev/null
-/* Test to check if member version multiversioning works correctly. */
-
-/* { dg-do run { target i?86-*-* x86_64-*-* } } */
-/* { dg-require-ifunc "" } */
-/* { dg-options "-march=x86-64" } */
-
-class Foo
-{
- public:
- /* Default version of foo. */
- __attribute__ ((target("default")))
- int foo ()
- {
- return 0;
- }
- /* corei7 version of foo. */
- __attribute__ ((target("arch=corei7")))
- int foo ()
- {
- return 0;
- }
-};
-
-int main ()
-{
- Foo f;
- return f.foo ();
-}
+++ /dev/null
-// { dg-do compile { target i?86-*-* x86_64-*-* } }
-// { dg-options "" }
-
-__attribute__((target ("default")))
-void foo (void) // { dg-message "previously defined here" }
-{
-}
-
-__attribute__((target (128)))
-void foo (void) // { dg-error "(not a string|redefinition)" }
-{
-}
+++ /dev/null
-// { dg-do compile { target i?86-*-* x86_64-*-* powerpc*-*-* aarch64*-*-* } }
-// { dg-options "" }
-
-__attribute__((target (11,12)))
-void foo (void) // { dg-error "not a string" }
-{
-}
+++ /dev/null
-// { dg-do compile { target i?86-*-* x86_64-*-* } }
-// { dg-options "" }
-
-void foo ();
-void foo () __attribute__((target ("sse4")));
-void foo () __attribute__((target ("default"))); // { dg-message "previous declaration" }
-void foo () // { dg-error "attribute for multi-versioned" }
-{
-}
+++ /dev/null
-/* { dg-do run { target i?86-*-* x86_64-*-* } } */
-/* { dg-require-ifunc "" } */
-
-__attribute__((target_clones("avx","arch=slm","arch=core-avx2","default")))
-int
-foo ()
-{
- return -2;
-}
-
-__attribute__((target("avx","arch=core-avx2")))
-int
-bar ()
-{
- return 2;
-}
-
-__attribute__((target("default")))
-int
-bar ()
-{
- return 2;
-}
-
-int
-main ()
-{
- int r = 0;
- r += bar ();
- r += foo ();
- r += bar ();
- r += foo ();
- r += bar ();
- return r - 2;
-}
+++ /dev/null
-/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
-/* { dg-require-ifunc "" } */
-
-__attribute__((target_clones("avx","arch=slm","default")))
-__attribute__((target("avx")))
-int foo (); /* { dg-warning "'target' attribute ignored due to conflict with 'target_clones' attribute" } */
-
-__attribute__((target_clones("avx","arch=slm","default"),always_inline))
-int bar (); /* { dg-warning "'always_inline' attribute ignored due to conflict with 'target_clones' attribute" } */
+++ /dev/null
-/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
-/* { dg-require-ifunc "" } */
-
-__attribute__((target("avx")))
-__attribute__((target_clones("avx","arch=slm","default")))
-int foo (); /* { dg-warning "'target_clones' attribute ignored due to conflict with 'target' attribute" } */
-
-__attribute__((always_inline,target_clones("avx","arch=slm","default")))
-int bar (); /* { dg-warning "'target_clones' attribute ignored due to conflict with 'always_inline' attribute" } */
+++ /dev/null
-/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
-/* { dg-require-ifunc "" } */
-/* { dg-options "-mavx" } */
-
-#include <immintrin.h>
-
-__m256 x, y, z;
-
-__attribute__((target("avx")))
-int bar()
-{
- x = _mm256_add_ps (y, z);
- return 1;
-}
-
-__attribute__((target("default")))
-int bar()
-{
- return 2;
-}
-
-int
-foobar()
-{
- if (__builtin_cpu_supports ("avx"))
- return bar();
- else
- return 0;
-}
-
-__attribute__((target_clones("default","sse3")))
-int foo()
-{
- return foobar();
-}
--- /dev/null
+# Copyright (C) 2018 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3. If not see
+# <http://www.gnu.org/licenses/>.
+
+# GCC testsuite that uses the `g++.exp' driver.
+
+# Exit immediately if this isn't a x86 target.
+if { ![istarget i?86*-*-*] && ![istarget x86_64-*-*] } then {
+ return
+}
+
+# Load support procs.
+load_lib g++-dg.exp
+load_lib clearcap.exp
+
+global DEFAULT_CXXFLAGS
+if ![info exists DEFAULT_CXXFLAGS] then {
+ set DEFAULT_CXXFLAGS " -pedantic-errors"
+}
+
+# Initialize `dg'.
+dg-init
+clearcap-init
+
+# Main loop.
+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.C]] \
+ "" $DEFAULT_CXXFLAGS
+
+# All done.
+clearcap-finish
+dg-finish
--- /dev/null
+/* Test case to check if Multiversioning works. */
+/* { dg-do run } */
+/* { dg-require-ifunc "" } */
+/* { dg-options "-O2 -fPIC" } */
+
+#include <assert.h>
+
+/* Default version. */
+int foo (); // Extra declaration that is merged with the second one.
+int foo () __attribute__ ((target("default")));
+/* The other versions of foo. Mix up the ordering and
+ check if the dispatching does it in the order of priority. */
+/* Check combination of target attributes. */
+int foo () __attribute__ ((target("arch=corei7,popcnt")));
+/* The target operands in this declaration and the definition are re-ordered.
+ This should still work. */
+int foo () __attribute__ ((target("ssse3,avx2")));
+
+/* Check for all target attributes for which dispatchers are available. */
+/* Check arch= */
+int foo () __attribute__((target("arch=core2")));
+int foo () __attribute__((target("arch=corei7")));
+int foo () __attribute__((target("arch=atom")));
+/* Check ISAs */
+int foo () __attribute__((target("avx")));
+int foo () __attribute__ ((target("arch=core2,sse4.2")));
+/* Check more arch=. */
+int foo () __attribute__((target("arch=amdfam10")));
+int foo () __attribute__((target("arch=bdver1")));
+int foo () __attribute__((target("arch=bdver2")));
+
+int (*p)() = &foo;
+int main ()
+{
+ int val = foo ();
+ assert (val == (*p)());
+
+ /* Check in the exact same order in which the dispatching
+ is expected to happen. */
+ if (__builtin_cpu_is ("bdver1"))
+ assert (val == 1);
+ else if (__builtin_cpu_is ("bdver2"))
+ assert (val == 2);
+ else if (__builtin_cpu_supports ("avx2")
+ && __builtin_cpu_supports ("ssse3"))
+ assert (val == 3);
+ else if (__builtin_cpu_supports ("avx"))
+ assert (val == 4);
+ else if (__builtin_cpu_is ("corei7")
+ && __builtin_cpu_supports ("popcnt"))
+ assert (val == 5);
+ else if (__builtin_cpu_is ("corei7"))
+ assert (val == 6);
+ else if (__builtin_cpu_is ("amdfam10h"))
+ assert (val == 7);
+ else if (__builtin_cpu_is ("core2")
+ && __builtin_cpu_supports ("sse4.2"))
+ assert (val == 8);
+ else if (__builtin_cpu_is ("core2"))
+ assert (val == 9);
+ else if (__builtin_cpu_is ("atom"))
+ assert (val == 10);
+ else
+ assert (val == 0);
+
+ return 0;
+}
+
+int __attribute__ ((target("default")))
+foo ()
+{
+ return 0;
+}
+
+int __attribute__ ((target("arch=corei7,popcnt")))
+foo ()
+{
+ return 5;
+}
+int __attribute__ ((target("avx2,ssse3")))
+foo ()
+{
+ return 3;
+}
+
+int __attribute__ ((target("arch=core2")))
+foo ()
+{
+ return 9;
+}
+
+int __attribute__ ((target("arch=corei7")))
+foo ()
+{
+ return 6;
+}
+
+int __attribute__ ((target("arch=atom")))
+foo ()
+{
+ return 10;
+}
+
+int __attribute__ ((target("avx")))
+foo ()
+{
+ return 4;
+}
+
+int __attribute__ ((target("arch=core2,sse4.2")))
+foo ()
+{
+ return 8;
+}
+
+int __attribute__ ((target("arch=amdfam10")))
+foo ()
+{
+ return 7;
+}
+
+int __attribute__ ((target("arch=bdver1")))
+foo ()
+{
+ return 1;
+}
+
+int __attribute__ ((target("arch=bdver2")))
+foo ()
+{
+ return 2;
+}
--- /dev/null
+// { dg-do assemble }
+// { dg-options "" }
+
+__attribute__((target ("popcnt"), used))
+void foo (void)
+{
+}
+
+__attribute__((target ("popcnt","avx"), used))
+void foo (void)
+{
+}
--- /dev/null
+// { dg-do compile }
+// { dg-options "-msse2" }
+
+int foo () __attribute__ ((target("default")));
+int foo () __attribute__ ((target("sse2")));
+
+int
+main ()
+{
+ return foo ();
+}
+
+int __attribute__ ((target("default")))
+foo ()
+{
+ return 0;
+}
+
+int __attribute__ ((target("sse2")))
+foo ()
+{
+ return 0;
+}
--- /dev/null
+// Test case to check if multiversioning works as expected when the versions
+// are defined in different files. Auxiliary file for mv12.C.
+
+#include "mv12.h"
+
+__attribute__ ((target ("sse4.2")))
+int foo ()
+{
+ return 1;
+}
--- /dev/null
+// Test case to check if multiversioning works as expected when the versions
+// are defined in different files.
+
+// { dg-do run }
+// { dg-require-ifunc "" }
+// { dg-options "-O2" }
+// { dg-additional-sources "mv12-aux.cc" }
+
+#include "mv12.h"
+
+int main ()
+{
+ if (__builtin_cpu_supports ("sse4.2"))
+ return foo () - 1;
+ return foo ();
+}
+
+__attribute__ ((target ("default")))
+int foo ()
+{
+ return 0;
+}
--- /dev/null
+// Header file used by mv12.C and mv12-aux.cc.
+
+int foo () __attribute__ ((target ("default")));
+int foo () __attribute__ ((target ("sse4.2")));
--- /dev/null
+// Test case to check if multiversioning functions that are extern "C"
+// generates errors.
+
+// { dg-do compile }
+
+extern "C"
+__attribute__ ((target ("default")))
+int foo () // { dg-message "previously defined here" }
+{
+ return 0;
+}
+
+extern "C"
+__attribute__ ((target ("sse4.2")))
+int foo () // { dg-error "redefinition" }
+{
+ return 1;
+}
--- /dev/null
+/* Test case to check if Multiversioning works. */
+/* { dg-do run } */
+/* { dg-require-ifunc "" } */
+/* { dg-options "-O2 -fPIC -march=x86-64" } */
+
+#include <assert.h>
+
+/* Default version. */
+int foo (); // Extra declaration that is merged with the second one.
+int foo () __attribute__ ((target("default")));
+
+int foo () __attribute__ ((target("arch=corei7")));
+
+int (*p)() = &foo;
+int main ()
+{
+ int val = foo ();
+ assert (val == (*p)());
+
+ /* Check in the exact same order in which the dispatching
+ is expected to happen. */
+ if (__builtin_cpu_is ("corei7"))
+ assert (val == 5);
+ else
+ assert (val == 0);
+
+ return 0;
+}
+
+int __attribute__ ((target("default")))
+foo ()
+{
+ return 0;
+}
+
+int __attribute__ ((target("arch=corei7")))
+foo ()
+{
+ return 5;
+}
--- /dev/null
+/* Test case to check if Multiversioning works. */
+/* { dg-do run } */
+/* { dg-require-ifunc "" } */
+/* { dg-options "-O2 -fPIC -march=x86-64" } */
+
+#include <assert.h>
+
+/* Default version. */
+int foo (); // Extra declaration that is merged with the second one.
+int foo () __attribute__ ((target("default")));
+
+int foo () __attribute__ ((target("arch=nehalem")));
+
+int (*p)() = &foo;
+int main ()
+{
+ int val = foo ();
+ assert (val == (*p)());
+
+ /* Check in the exact same order in which the dispatching
+ is expected to happen. */
+ if (__builtin_cpu_is ("corei7"))
+ assert (val == 5);
+ else
+ assert (val == 0);
+
+ return 0;
+}
+
+int __attribute__ ((target("default")))
+foo ()
+{
+ return 0;
+}
+
+int __attribute__ ((target("arch=nehalem")))
+foo ()
+{
+ return 5;
+}
--- /dev/null
+// Test that dispatching can choose the right multiversion
+// for Intel CPUs with the same internal GCC processor id
+// but slighly different sets of x86 extensions.
+
+// { dg-do run }
+// { dg-require-ifunc "" }
+// { dg-options "-O2" }
+
+#include <assert.h>
+
+int __attribute__ ((target("default")))
+foo ()
+{
+ return 0;
+}
+
+int __attribute__ ((target("arch=nehalem")))
+foo ()
+{
+ return 4;
+}
+
+int __attribute__ ((target("arch=westmere")))
+foo ()
+{
+ return 5;
+}
+
+int __attribute__ ((target("arch=sandybridge")))
+foo ()
+{
+ return 8;
+}
+
+int __attribute__ ((target("arch=ivybridge")))
+foo ()
+{
+ return 9;
+}
+
+int __attribute__ ((target("arch=haswell")))
+foo ()
+{
+ return 12;
+}
+
+int __attribute__ ((target("arch=broadwell"))) foo () {
+ return 13;
+}
+
+int __attribute__ ((target("arch=skylake"))) foo () {
+ return 14;
+}
+
+int __attribute__ ((target("arch=skylake-avx512"))) foo () {
+ return 15;
+}
+
+int __attribute__ ((target("arch=cannonlake"))) foo () {
+ return 16;
+}
+
+int __attribute__ ((target("arch=icelake-client"))) foo () {
+ return 17;
+}
+
+int __attribute__ ((target("arch=icelake-server"))) foo () {
+ return 18;
+}
+
+int main ()
+{
+ int val = foo ();
+
+ if (__builtin_cpu_is ("nehalem"))
+ assert (val == 4);
+ else if (__builtin_cpu_is ("westmere"))
+ assert (val == 5);
+ else if (__builtin_cpu_is ("sandybridge"))
+ assert (val == 8);
+ else if (__builtin_cpu_is ("ivybridge"))
+ assert (val == 9);
+ else if (__builtin_cpu_is ("haswell"))
+ assert (val == 12);
+ else if (__builtin_cpu_is ("broadwell"))
+ assert (val == 13);
+ else if (__builtin_cpu_is ("skylake"))
+ assert (val == 14);
+ else if (__builtin_cpu_is ("skylake-avx512"))
+ assert (val == 15);
+ else if (__builtin_cpu_is ("cannonlake"))
+ assert (val == 16);
+ else if (__builtin_cpu_is ("icelake-client"))
+ assert (val == 17);
+ else if (__builtin_cpu_is ("icelake-server"))
+ assert (val == 18);
+ else
+ assert (val == 0);
+
+ return 0;
+}
--- /dev/null
+// Test case to check if Multiversioning works for BMI and BMI2.
+
+// { dg-do run }
+// { dg-require-ifunc "" }
+// { dg-options "-O2" }
+
+#include <assert.h>
+
+// Check BMI feature selection works
+int foo () __attribute__((target("default")));
+int foo () __attribute__((target("bmi")));
+int foo () __attribute__((target("bmi2")));
+
+// Check specialized versions for archs with BMI is chosen over generic BMI versions.
+int bar () __attribute__((target("default")));
+int bar () __attribute__((target("bmi")));
+int bar () __attribute__((target("bmi2")));
+int bar () __attribute__((target("arch=btver2")));
+int bar () __attribute__((target("arch=haswell")));
+
+int main ()
+{
+ int val = foo ();
+
+ if (__builtin_cpu_supports ("bmi2"))
+ assert (val == 2);
+ else if (__builtin_cpu_supports ("bmi"))
+ assert (val == 1);
+ else
+ assert (val == 0);
+
+ val = bar ();
+
+ if (__builtin_cpu_is ("btver2"))
+ assert (val == 5);
+ else if (__builtin_cpu_is ("haswell"))
+ assert (val == 6);
+ else if (__builtin_cpu_supports ("bmi2"))
+ assert (val == 2);
+ else if (__builtin_cpu_supports ("bmi"))
+ assert (val == 1);
+ else
+ assert (val == 0);
+
+ return 0;
+}
+
+int __attribute__ ((target("default")))
+foo ()
+{
+ return 0;
+}
+
+int __attribute__ ((target("bmi")))
+foo ()
+{
+ return 1;
+}
+int __attribute__ ((target("bmi2")))
+foo ()
+{
+ return 2;
+}
+
+int __attribute__ ((target("default")))
+bar ()
+{
+ return 0;
+}
+
+int __attribute__ ((target("bmi")))
+bar ()
+{
+ return 1;
+}
+int __attribute__ ((target("bmi2")))
+bar ()
+{
+ return 2;
+}
+
+int __attribute__ ((target("arch=btver2")))
+bar ()
+{
+ return 5;
+}
+
+int __attribute__ ((target("arch=haswell")))
+bar ()
+{
+ return 6;
+}
+
--- /dev/null
+/* Test case to check if Multiversioning works. */
+/* { dg-do run } */
+/* { dg-require-ifunc "" } */
+/* { dg-require-effective-target pie } */
+/* { dg-options "-O2 -fPIE -pie" } */
+
+#include "mv1.C"
--- /dev/null
+/* Test case to check if Multiversioning works. */
+/* { dg-do run } */
+/* { dg-require-ifunc "" } */
+/* { dg-require-effective-target pie } */
+/* { dg-options "-O2 -fPIE -pie -march=x86-64" } */
+
+#include "mv14.C"
--- /dev/null
+/* Test case to check if Multiversioning chooses the correct
+ dispatching order when versions are for various ISAs. */
+/* { dg-do run } */
+/* { dg-require-ifunc "" } */
+/* { dg-options "-O2" } */
+
+#include <assert.h>
+
+/* Default version. */
+int foo () __attribute__ ((target ("default")));
+/* The dispatch checks should be in the exact reverse order of the
+ declarations below. */
+int foo () __attribute__ ((target ("mmx")));
+int foo () __attribute__ ((target ("sse")));
+int foo () __attribute__ ((target ("sse2")));
+int foo () __attribute__ ((target ("sse3")));
+int foo () __attribute__ ((target ("ssse3")));
+int foo () __attribute__ ((target ("sse4.1")));
+int foo () __attribute__ ((target ("sse4.2")));
+int foo () __attribute__ ((target ("popcnt")));
+int foo () __attribute__ ((target ("avx")));
+int foo () __attribute__ ((target ("avx2")));
+int foo () __attribute__ ((target ("avx512f")));
+
+int main ()
+{
+ int val = foo ();
+
+ if (__builtin_cpu_supports ("avx512f"))
+ assert (val == 11);
+ else if (__builtin_cpu_supports ("avx2"))
+ assert (val == 10);
+ else if (__builtin_cpu_supports ("avx"))
+ assert (val == 9);
+ else if (__builtin_cpu_supports ("popcnt"))
+ assert (val == 8);
+ else if (__builtin_cpu_supports ("sse4.2"))
+ assert (val == 7);
+ else if (__builtin_cpu_supports ("sse4.1"))
+ assert (val == 6);
+ else if (__builtin_cpu_supports ("ssse3"))
+ assert (val == 5);
+ else if (__builtin_cpu_supports ("sse3"))
+ assert (val == 4);
+ else if (__builtin_cpu_supports ("sse2"))
+ assert (val == 3);
+ else if (__builtin_cpu_supports ("sse"))
+ assert (val == 2);
+ else if (__builtin_cpu_supports ("mmx"))
+ assert (val == 1);
+ else
+ assert (val == 0);
+
+ return 0;
+}
+
+int __attribute__ ((target("default")))
+foo ()
+{
+ return 0;
+}
+
+int __attribute__ ((target("mmx")))
+foo ()
+{
+ return 1;
+}
+
+int __attribute__ ((target("sse")))
+foo ()
+{
+ return 2;
+}
+
+int __attribute__ ((target("sse2")))
+foo ()
+{
+ return 3;
+}
+
+int __attribute__ ((target("sse3")))
+foo ()
+{
+ return 4;
+}
+
+int __attribute__ ((target("ssse3")))
+foo ()
+{
+ return 5;
+}
+
+int __attribute__ ((target("sse4.1")))
+foo ()
+{
+ return 6;
+}
+
+int __attribute__ ((target("sse4.2")))
+foo ()
+{
+ return 7;
+}
+
+int __attribute__ ((target("popcnt")))
+foo ()
+{
+ return 8;
+}
+
+int __attribute__ ((target("avx")))
+foo ()
+{
+ return 9;
+}
+
+int __attribute__ ((target("avx2")))
+foo ()
+{
+ return 10;
+}
+
+int __attribute__ ((target("avx512f")))
+foo ()
+{
+ return 11;
+}
--- /dev/null
+/* Test case to check if Multiversioning works. */
+/* { dg-do run } */
+/* { dg-require-ifunc "" } */
+/* { dg-require-effective-target pie } */
+/* { dg-options "-O2 -fPIE -pie -march=x86-64" } */
+
+#include "mv15.C"
--- /dev/null
+/* Test case to check if Multiversioning works. */
+/* { dg-do run } */
+/* { dg-require-ifunc "" } */
+/* { dg-require-effective-target static } */
+/* { dg-options "-O2 -static" } */
+
+#include "mv1.C"
--- /dev/null
+/* Test case to check if Multiversioning works. */
+/* { dg-do run } */
+/* { dg-require-ifunc "" } */
+/* { dg-require-effective-target static } */
+/* { dg-options "-O2 -static -march=x86-64" } */
+
+#include "mv14.C"
--- /dev/null
+/* Test case to check if Multiversioning works. */
+/* { dg-do run } */
+/* { dg-require-ifunc "" } */
+/* { dg-require-effective-target static } */
+/* { dg-options "-O2 -static -march=x86-64" } */
+
+#include "mv15.C"
--- /dev/null
+// Test case to check if Multiversioning works for AES
+
+// { dg-do run }
+// { dg-require-ifunc "" }
+// { dg-options "-O2" }
+
+#include <assert.h>
+
+// Check if AES feature selection works
+int foo () __attribute__((target("default")));
+int foo () __attribute__((target("aes")));
+
+int main ()
+{
+ int val = foo ();
+
+ if (__builtin_cpu_supports ("aes"))
+ assert (val == 1);
+ else
+ assert (val == 0);
+
+ return 0;
+}
+
+int __attribute__ ((target("default")))
+foo ()
+{
+ return 0;
+}
+
+int __attribute__ ((target("aes")))
+foo ()
+{
+ return 1;
+}
--- /dev/null
+// Test case to check if Multiversioning works for PCLMUL
+
+// { dg-do run }
+// { dg-require-ifunc "" }
+// { dg-options "-O2" }
+
+#include <assert.h>
+
+// Check if PCLMUL feature selection works
+int foo () __attribute__((target("default")));
+int foo () __attribute__((target("pclmul")));
+
+int main ()
+{
+ int val = foo ();
+
+ if (__builtin_cpu_supports ("pclmul"))
+ assert (val == 1);
+ else
+ assert (val == 0);
+
+ return 0;
+}
+
+int __attribute__ ((target("default")))
+foo ()
+{
+ return 0;
+}
+
+int __attribute__ ((target("pclmul")))
+foo ()
+{
+ return 1;
+}
--- /dev/null
+// PR c++/84059
+// { dg-do compile }
+// { dg-require-ifunc "" }
+
+template <typename> struct a
+{
+ int __attribute__ ((target ("arch=ivybridge"))) c (int) {return 1;}
+ int __attribute__ ((target ("default"))) c (int) { return 2; }
+};
+void
+d ()
+{
+ a<double> b;
+ b.c (2);
+}
--- /dev/null
+// PR c++/83911
+// { dg-do compile }
+// { dg-require-ifunc "" }
+
+class SimdFloat
+{
+public:
+ __attribute__ ((target ("default")))
+ SimdFloat(float x) {}
+
+ __attribute__ ((target ("avx2")))
+ SimdFloat(float x) {}
+};
+
+SimdFloat foo()
+{
+ return 1;
+}
--- /dev/null
+/* Test case to check if a call to a multiversioned function
+ is replaced with a direct call to the particular version when
+ the most specialized version's target attributes match the
+ caller.
+
+ In this program, foo is multiversioned but there is no default
+ function. This is an error if the call has to go through a
+ dispatcher. However, the call to foo in bar can be replaced
+ with a direct call to the popcnt version of foo. Hence, this
+ test should pass. */
+
+/* { dg-do run } */
+/* { dg-options "-O2" } */
+
+
+int __attribute__ ((target ("sse")))
+foo ()
+{
+ return 1;
+}
+int __attribute__ ((target ("popcnt")))
+foo ()
+{
+ return 0;
+}
+
+int __attribute__ ((target ("popcnt")))
+bar ()
+{
+ return foo ();
+}
+
+int main ()
+{
+ return bar ();
+}
--- /dev/null
+/* Test case to check if the compiler generates an error message
+ when the default version of a multiversioned function is absent
+ and its pointer is taken. */
+
+/* { dg-do compile } */
+/* { dg-require-ifunc "" } */
+/* { dg-options "-O2" } */
+
+int __attribute__ ((target ("sse")))
+foo ()
+{
+ return 1;
+}
+int __attribute__ ((target ("popcnt")))
+foo ()
+{
+ return 0;
+}
+
+int main ()
+{
+ int (*p)() = &foo; /* { dg-error "use of multiversioned function without a default" {} } */
+ return (*p)();
+}
--- /dev/null
+/* Test case to check if multiversioned functions are still generated if they are
+ marked comdat with inline keyword. */
+
+/* { dg-do run } */
+/* { dg-require-ifunc "" } */
+/* { dg-options "-O2" } */
+
+
+/* Default version. */
+inline int __attribute__ ((target ("default")))
+foo ()
+{
+ return 0;
+}
+
+inline int __attribute__ ((target ("popcnt")))
+foo ()
+{
+ return 0;
+}
+
+int main ()
+{
+ return foo ();
+}
--- /dev/null
+/* Test to check if member version multiversioning works correctly. */
+
+/* { dg-do run } */
+/* { dg-require-ifunc "" } */
+/* { dg-options "-march=x86-64" } */
+
+class Foo
+{
+ public:
+ /* Default version of foo. */
+ __attribute__ ((target("default")))
+ int foo ()
+ {
+ return 0;
+ }
+ /* corei7 version of foo. */
+ __attribute__ ((target("arch=corei7")))
+ int foo ()
+ {
+ return 0;
+ }
+};
+
+int main ()
+{
+ Foo f;
+ return f.foo ();
+}
--- /dev/null
+// { dg-do compile }
+// { dg-options "" }
+
+__attribute__((target ("default")))
+void foo (void) // { dg-message "previously defined here" }
+{
+}
+
+__attribute__((target (128)))
+void foo (void) // { dg-error "(not a string|redefinition)" }
+{
+}
--- /dev/null
+// { dg-do compile }
+// { dg-options "" }
+
+__attribute__((target (11,12)))
+void foo (void) // { dg-error "not a string" }
+{
+}
--- /dev/null
+// { dg-do compile }
+// { dg-options "" }
+
+void foo ();
+void foo () __attribute__((target ("sse4")));
+void foo () __attribute__((target ("default"))); // { dg-message "previous declaration" }
+void foo () // { dg-error "attribute for multi-versioned" }
+{
+}
--- /dev/null
+/* { dg-do run} */
+/* { dg-require-ifunc "" } */
+
+__attribute__((target_clones("avx","arch=slm","arch=core-avx2","default")))
+int
+foo ()
+{
+ return -2;
+}
+
+__attribute__((target("avx","arch=core-avx2")))
+int
+bar ()
+{
+ return 2;
+}
+
+__attribute__((target("default")))
+int
+bar ()
+{
+ return 2;
+}
+
+int
+main ()
+{
+ int r = 0;
+ r += bar ();
+ r += foo ();
+ r += bar ();
+ r += foo ();
+ r += bar ();
+ return r - 2;
+}
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-ifunc "" } */
+
+__attribute__((target_clones("avx","arch=slm","default")))
+__attribute__((target("avx")))
+int foo (); /* { dg-warning "'target' attribute ignored due to conflict with 'target_clones' attribute" } */
+
+__attribute__((target_clones("avx","arch=slm","default"),always_inline))
+int bar (); /* { dg-warning "'always_inline' attribute ignored due to conflict with 'target_clones' attribute" } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-ifunc "" } */
+
+__attribute__((target("avx")))
+__attribute__((target_clones("avx","arch=slm","default")))
+int foo (); /* { dg-warning "'target_clones' attribute ignored due to conflict with 'target' attribute" } */
+
+__attribute__((always_inline,target_clones("avx","arch=slm","default")))
+int bar (); /* { dg-warning "'target_clones' attribute ignored due to conflict with 'always_inline' attribute" } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-ifunc "" } */
+/* { dg-options "-mavx" } */
+
+#include <immintrin.h>
+
+__m256 x, y, z;
+
+__attribute__((target("avx")))
+int bar()
+{
+ x = _mm256_add_ps (y, z);
+ return 1;
+}
+
+__attribute__((target("default")))
+int bar()
+{
+ return 2;
+}
+
+int
+foobar()
+{
+ if (__builtin_cpu_supports ("avx"))
+ return bar();
+ else
+ return 0;
+}
+
+__attribute__((target_clones("default","sse3")))
+int foo()
+{
+ return foobar();
+}
load_lib gcc-dg.exp
load_lib clearcap.exp
-# Return 1 if attribute ms_hook_prologue is supported.
-proc check_effective_target_ms_hook_prologue { } {
- if { [check_no_compiler_messages ms_hook_prologue object {
- void __attribute__ ((__ms_hook_prologue__)) foo ();
- } ""] } {
- return 1
- } else {
- return 0
- }
-}
-
-# Return 1 if 3dnow instructions can be compiled.
-proc check_effective_target_3dnow { } {
- return [check_no_compiler_messages 3dnow object {
- typedef int __m64 __attribute__ ((__vector_size__ (8)));
- typedef float __v2sf __attribute__ ((__vector_size__ (8)));
-
- __m64 _m_pfadd (__m64 __A, __m64 __B)
- {
- return (__m64) __builtin_ia32_pfadd ((__v2sf)__A, (__v2sf)__B);
- }
- } "-O2 -m3dnow" ]
-}
-
-# Return 1 if sse3 instructions can be compiled.
-proc check_effective_target_sse3 { } {
- return [check_no_compiler_messages sse3 object {
- typedef double __m128d __attribute__ ((__vector_size__ (16)));
- typedef double __v2df __attribute__ ((__vector_size__ (16)));
-
- __m128d _mm_addsub_pd (__m128d __X, __m128d __Y)
- {
- return (__m128d) __builtin_ia32_addsubpd ((__v2df)__X, (__v2df)__Y);
- }
- } "-O2 -msse3" ]
-}
-
-# Return 1 if ssse3 instructions can be compiled.
-proc check_effective_target_ssse3 { } {
- return [check_no_compiler_messages ssse3 object {
- typedef long long __m128i __attribute__ ((__vector_size__ (16)));
- typedef int __v4si __attribute__ ((__vector_size__ (16)));
-
- __m128i _mm_abs_epi32 (__m128i __X)
- {
- return (__m128i) __builtin_ia32_pabsd128 ((__v4si)__X);
- }
- } "-O2 -mssse3" ]
-}
-
-# Return 1 if aes instructions can be compiled.
-proc check_effective_target_aes { } {
- return [check_no_compiler_messages aes object {
- typedef long long __m128i __attribute__ ((__vector_size__ (16)));
- typedef long long __v2di __attribute__ ((__vector_size__ (16)));
-
- __m128i _mm_aesimc_si128 (__m128i __X)
- {
- return (__m128i) __builtin_ia32_aesimc128 ((__v2di)__X);
- }
- } "-O2 -maes" ]
-}
-
-# Return 1 if vaes instructions can be compiled.
-proc check_effective_target_vaes { } {
- return [check_no_compiler_messages vaes object {
- typedef long long __m128i __attribute__ ((__vector_size__ (16)));
- typedef long long __v2di __attribute__ ((__vector_size__ (16)));
-
- __m128i _mm_aesimc_si128 (__m128i __X)
- {
- return (__m128i) __builtin_ia32_aesimc128 ((__v2di)__X);
- }
- } "-O2 -maes -mavx" ]
-}
-
-# Return 1 if pclmul instructions can be compiled.
-proc check_effective_target_pclmul { } {
- return [check_no_compiler_messages pclmul object {
- typedef long long __m128i __attribute__ ((__vector_size__ (16)));
- typedef long long __v2di __attribute__ ((__vector_size__ (16)));
-
- __m128i pclmulqdq_test (__m128i __X, __m128i __Y)
- {
- return (__m128i) __builtin_ia32_pclmulqdq128 ((__v2di)__X,
- (__v2di)__Y,
- 1);
- }
- } "-O2 -mpclmul" ]
-}
-
-# Return 1 if vpclmul instructions can be compiled.
-proc check_effective_target_vpclmul { } {
- return [check_no_compiler_messages vpclmul object {
- typedef long long __m128i __attribute__ ((__vector_size__ (16)));
- typedef long long __v2di __attribute__ ((__vector_size__ (16)));
-
- __m128i pclmulqdq_test (__m128i __X, __m128i __Y)
- {
- return (__m128i) __builtin_ia32_pclmulqdq128 ((__v2di)__X,
- (__v2di)__Y,
- 1);
- }
- } "-O2 -mpclmul -mavx" ]
-}
-
-# Return 1 if sse4a instructions can be compiled.
-proc check_effective_target_sse4a { } {
- return [check_no_compiler_messages sse4a object {
- typedef long long __m128i __attribute__ ((__vector_size__ (16)));
- typedef long long __v2di __attribute__ ((__vector_size__ (16)));
-
- __m128i _mm_insert_si64 (__m128i __X,__m128i __Y)
- {
- return (__m128i) __builtin_ia32_insertq ((__v2di)__X, (__v2di)__Y);
- }
- } "-O2 -msse4a" ]
-}
-
-# Return 1 if fma4 instructions can be compiled.
-proc check_effective_target_fma4 { } {
- return [check_no_compiler_messages fma4 object {
- typedef float __m128 __attribute__ ((__vector_size__ (16)));
- typedef float __v4sf __attribute__ ((__vector_size__ (16)));
- __m128 _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C)
- {
- return (__m128) __builtin_ia32_vfmaddps ((__v4sf)__A,
- (__v4sf)__B,
- (__v4sf)__C);
- }
- } "-O2 -mfma4" ]
-}
-
-# Return 1 if fma instructions can be compiled.
-proc check_effective_target_fma { } {
- return [check_no_compiler_messages fma object {
- typedef float __m128 __attribute__ ((__vector_size__ (16)));
- typedef float __v4sf __attribute__ ((__vector_size__ (16)));
- __m128 _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C)
- {
- return (__m128) __builtin_ia32_vfmaddps ((__v4sf)__A,
- (__v4sf)__B,
- (__v4sf)__C);
- }
- } "-O2 -mfma" ]
-}
-
-# Return 1 if xop instructions can be compiled.
-proc check_effective_target_xop { } {
- return [check_no_compiler_messages xop object {
- typedef long long __m128i __attribute__ ((__vector_size__ (16)));
- typedef short __v8hi __attribute__ ((__vector_size__ (16)));
- __m128i _mm_maccs_epi16(__m128i __A, __m128i __B, __m128i __C)
- {
- return (__m128i) __builtin_ia32_vpmacssww ((__v8hi)__A,
- (__v8hi)__B,
- (__v8hi)__C);
- }
- } "-O2 -mxop" ]
-}
-
-# Return 1 if lzcnt instruction can be compiled.
-proc check_effective_target_lzcnt { } {
- return [check_no_compiler_messages lzcnt object {
- unsigned short _lzcnt (unsigned short __X)
- {
- return __builtin_clzs (__X);
- }
- } "-mlzcnt" ]
-}
-
-# Return 1 if bmi instructions can be compiled.
-proc check_effective_target_bmi { } {
- return [check_no_compiler_messages bmi object {
- unsigned int __bextr_u32 (unsigned int __X, unsigned int __Y)
- {
- return __builtin_ia32_bextr_u32 (__X, __Y);
- }
- } "-mbmi" ]
-}
-
-# Return 1 if ADX instructions can be compiled.
-proc check_effective_target_adx { } {
- return [check_no_compiler_messages adx object {
- unsigned char
- _adxcarry_u32 (unsigned char __CF, unsigned int __X,
- unsigned int __Y, unsigned int *__P)
- {
- return __builtin_ia32_addcarryx_u32 (__CF, __X, __Y, __P);
- }
- } "-madx" ]
-}
-
-# Return 1 if rtm instructions can be compiled.
-proc check_effective_target_rtm { } {
- return [check_no_compiler_messages rtm object {
- void
- _rtm_xend (void)
- {
- return __builtin_ia32_xend ();
- }
- } "-mrtm" ]
-}
-
-# Return 1 if avx512vl instructions can be compiled.
-proc check_effective_target_avx512vl { } {
- return [check_no_compiler_messages avx512vl object {
- typedef long long __v4di __attribute__ ((__vector_size__ (32)));
- __v4di
- mm256_and_epi64 (__v4di __X, __v4di __Y)
- {
- __v4di __W;
- return __builtin_ia32_pandq256_mask (__X, __Y, __W, -1);
- }
- } "-mavx512vl" ]
-}
-
-# Return 1 if avx512cd instructions can be compiled.
-proc check_effective_target_avx512cd { } {
- return [check_no_compiler_messages avx512cd_trans object {
- typedef long long __v8di __attribute__ ((__vector_size__ (64)));
- __v8di
- _mm512_conflict_epi64 (__v8di __W, __v8di __A)
- {
- return (__v8di) __builtin_ia32_vpconflictdi_512_mask ((__v8di) __A,
- (__v8di) __W,
- -1);
- }
- } "-Wno-psabi -mavx512cd" ]
-}
-
-# Return 1 if avx512er instructions can be compiled.
-proc check_effective_target_avx512er { } {
- return [check_no_compiler_messages avx512er_trans object {
- typedef float __v16sf __attribute__ ((__vector_size__ (64)));
- __v16sf
- mm512_exp2a23_ps (__v16sf __X)
- {
- return __builtin_ia32_exp2ps_mask (__X, __X, -1, 4);
- }
- } "-Wno-psabi -mavx512er" ]
-}
-
-# Return 1 if sha instructions can be compiled.
-proc check_effective_target_sha { } {
- return [check_no_compiler_messages sha object {
- typedef long long __m128i __attribute__ ((__vector_size__ (16)));
- typedef int __v4si __attribute__ ((__vector_size__ (16)));
-
- __m128i _mm_sha1msg1_epu32 (__m128i __X, __m128i __Y)
- {
- return (__m128i) __builtin_ia32_sha1msg1 ((__v4si)__X,
- (__v4si)__Y);
- }
- } "-O2 -msha" ]
-}
-
-# Return 1 if avx512dq instructions can be compiled.
-proc check_effective_target_avx512dq { } {
- return [check_no_compiler_messages avx512dq object {
- typedef long long __v8di __attribute__ ((__vector_size__ (64)));
- __v8di
- _mm512_mask_mullo_epi64 (__v8di __W, __v8di __A, __v8di __B)
- {
- return (__v8di) __builtin_ia32_pmullq512_mask ((__v8di) __A,
- (__v8di) __B,
- (__v8di) __W,
- -1);
- }
- } "-mavx512dq" ]
-}
-
-# Return 1 if avx512bw instructions can be compiled.
-proc check_effective_target_avx512bw { } {
- return [check_no_compiler_messages avx512bw object {
- typedef short __v32hi __attribute__ ((__vector_size__ (64)));
- __v32hi
- _mm512_mask_mulhrs_epi16 (__v32hi __W, __v32hi __A, __v32hi __B)
- {
- return (__v32hi) __builtin_ia32_pmulhrsw512_mask ((__v32hi) __A,
- (__v32hi) __B,
- (__v32hi) __W,
- -1);
- }
- } "-mavx512bw" ]
-}
-
-# Return 1 if avx512ifma instructions can be compiled.
-proc check_effective_target_avx512ifma { } {
- return [check_no_compiler_messages avx512ifma object {
- typedef long long __v8di __attribute__ ((__vector_size__ (64)));
- __v8di
- _mm512_madd52lo_epu64 (__v8di __X, __v8di __Y, __v8di __Z)
- {
- return (__v8di) __builtin_ia32_vpmadd52luq512_mask ((__v8di) __X,
- (__v8di) __Y,
- (__v8di) __Z,
- -1);
- }
- } "-mavx512ifma" ]
-}
-
-# Return 1 if avx512vbmi instructions can be compiled.
-proc check_effective_target_avx512vbmi { } {
- return [check_no_compiler_messages avx512vbmi object {
- typedef char __v64qi __attribute__ ((__vector_size__ (64)));
- __v64qi
- _mm512_multishift_epi64_epi8 (__v64qi __X, __v64qi __Y)
- {
- return (__v64qi) __builtin_ia32_vpmultishiftqb512_mask ((__v64qi) __X,
- (__v64qi) __Y,
- (__v64qi) __Y,
- -1);
- }
- } "-mavx512vbmi" ]
-}
-
-# Return 1 if avx512_4fmaps instructions can be compiled.
-proc check_effective_target_avx5124fmaps { } {
- return [check_no_compiler_messages avx5124fmaps object {
- typedef float __v16sf __attribute__ ((__vector_size__ (64)));
- typedef float __v4sf __attribute__ ((__vector_size__ (16)));
-
- __v16sf
- _mm512_mask_4fmadd_ps (__v16sf __DEST, __v16sf __A, __v16sf __B, __v16sf __C,
- __v16sf __D, __v16sf __E, __v4sf *__F)
- {
- return (__v16sf) __builtin_ia32_4fmaddps_mask ((__v16sf) __A,
- (__v16sf) __B,
- (__v16sf) __C,
- (__v16sf) __D,
- (__v16sf) __E,
- (const __v4sf *) __F,
- (__v16sf) __DEST,
- 0xffff);
- }
- } "-mavx5124fmaps" ]
-}
-
-# Return 1 if avx512_4vnniw instructions can be compiled.
-proc check_effective_target_avx5124vnniw { } {
- return [check_no_compiler_messages avx5124vnniw object {
- typedef int __v16si __attribute__ ((__vector_size__ (64)));
- typedef int __v4si __attribute__ ((__vector_size__ (16)));
-
- __v16si
- _mm512_4dpwssd_epi32 (__v16si __A, __v16si __B, __v16si __C,
- __v16si __D, __v16si __E, __v4si *__F)
- {
- return (__v16si) __builtin_ia32_vp4dpwssd ((__v16si) __B,
- (__v16si) __C,
- (__v16si) __D,
- (__v16si) __E,
- (__v16si) __A,
- (const __v4si *) __F);
- }
- } "-mavx5124vnniw" ]
-}
-
-# Return 1 if avx512_vpopcntdq instructions can be compiled.
-proc check_effective_target_avx512vpopcntdq { } {
- return [check_no_compiler_messages avx512vpopcntdq object {
- typedef int __v16si __attribute__ ((__vector_size__ (64)));
-
- __v16si
- _mm512_popcnt_epi32 (__v16si __A)
- {
- return (__v16si) __builtin_ia32_vpopcountd_v16si ((__v16si) __A);
- }
- } "-mavx512vpopcntdq" ]
-}
-
-# Return 1 if 128 or 256-bit avx512_vpopcntdq instructions can be compiled.
-proc check_effective_target_avx512vpopcntdqvl { } {
- return [check_no_compiler_messages avx512vpopcntdqvl object {
- typedef int __v8si __attribute__ ((__vector_size__ (32)));
-
- __v8si
- _mm256_popcnt_epi32 (__v8si __A)
- {
- return (__v8si) __builtin_ia32_vpopcountd_v8si ((__v8si) __A);
- }
- } "-mavx512vpopcntdq -mavx512vl" ]
-}
-
-# Return 1 if gfni instructions can be compiled.
-proc check_effective_target_gfni { } {
- return [check_no_compiler_messages gfni object {
- typedef char __v16qi __attribute__ ((__vector_size__ (16)));
-
- __v16qi
- _mm_gf2p8affineinv_epi64_epi8 (__v16qi __A, __v16qi __B, const int __C)
- {
- return (__v16qi) __builtin_ia32_vgf2p8affineinvqb_v16qi ((__v16qi) __A,
- (__v16qi) __B,
- 0);
- }
- } "-mgfni" ]
-}
-
-# Return 1 if avx512vbmi2 instructions can be compiled.
-proc check_effective_target_avx512vbmi2 { } {
- return [check_no_compiler_messages avx512vbmi2 object {
- typedef char __v16qi __attribute__ ((__vector_size__ (16)));
- typedef unsigned long long __mmask16;
-
- __v16qi
- _mm_mask_compress_epi8 (__v16qi __A, __mmask16 __B, __v16qi __C)
- {
- return (__v16qi) __builtin_ia32_compressqi128_mask((__v16qi)__C,
- (__v16qi)__A,
- (__mmask16)__B);
- }
- } "-mavx512vbmi2 -mavx512vl" ]
-}
-
-# Return 1 if avx512vbmi2 instructions can be compiled.
-proc check_effective_target_avx512vnni { } {
- return [check_no_compiler_messages avx512vnni object {
- typedef int __v16si __attribute__ ((__vector_size__ (64)));
-
- __v16si
- _mm_mask_compress_epi8 (__v16si __A, __v16si __B, __v16si __C)
- {
- return (__v16si) __builtin_ia32_vpdpbusd_v16si ((__v16si)__A,
- (__v16si)__B,
- (__v16si)__C);
- }
- } "-mavx512vnni -mavx512f" ]
-}
-
-# Return 1 if vaes instructions can be compiled.
-proc check_effective_target_avx512vaes { } {
- return [check_no_compiler_messages avx512vaes object {
-
- typedef int __v16si __attribute__ ((__vector_size__ (64)));
-
- __v32qi
- _mm256_aesdec_epi128 (__v32qi __A, __v32qi __B)
- {
- return (__v32qi)__builtin_ia32_vaesdec_v32qi ((__v32qi) __A, (__v32qi) __B);
- }
- } "-mvaes" ]
-}
-
-# Return 1 if vpclmulqdq instructions can be compiled.
-proc check_effective_target_vpclmulqdq { } {
- return [check_no_compiler_messages vpclmulqdq object {
- typedef long long __v4di __attribute__ ((__vector_size__ (32)));
-
- __v4di
- _mm256_clmulepi64_epi128 (__v4di __A, __v4di __B)
- {
- return (__v4di) __builtin_ia32_vpclmulqdq_v4di (__A, __B, 0);
- }
- } "-mvpclmulqdq -mavx512vl" ]
-}
-
-# Return 1 if avx512_bitalg instructions can be compiled.
-proc check_effective_target_avx512bitalg { } {
- return [check_no_compiler_messages avx512bitalg object {
- typedef short int __v32hi __attribute__ ((__vector_size__ (64)));
-
- __v32hi
- _mm512_popcnt_epi16 (__v32hi __A)
- {
- return (__v32hi) __builtin_ia32_vpopcountw_v32hi ((__v32hi) __A);
- }
- } "-mavx512bitalg" ]
-}
-
# If a testcase doesn't have special options, use these.
global DEFAULT_CFLAGS
if ![info exists DEFAULT_CFLAGS] then {
} "-O2 -mf16c" ]
}
+proc check_effective_target_ms_hook_prologue { } {
+ if { [check_no_compiler_messages ms_hook_prologue object {
+ void __attribute__ ((__ms_hook_prologue__)) foo ();
+ } ""] } {
+ return 1
+ } else {
+ return 0
+ }
+}
+
+# Return 1 if 3dnow instructions can be compiled.
+proc check_effective_target_3dnow { } {
+ return [check_no_compiler_messages 3dnow object {
+ typedef int __m64 __attribute__ ((__vector_size__ (8)));
+ typedef float __v2sf __attribute__ ((__vector_size__ (8)));
+
+ __m64 _m_pfadd (__m64 __A, __m64 __B)
+ {
+ return (__m64) __builtin_ia32_pfadd ((__v2sf)__A, (__v2sf)__B);
+ }
+ } "-O2 -m3dnow" ]
+}
+
+# Return 1 if sse3 instructions can be compiled.
+proc check_effective_target_sse3 { } {
+ return [check_no_compiler_messages sse3 object {
+ typedef double __m128d __attribute__ ((__vector_size__ (16)));
+ typedef double __v2df __attribute__ ((__vector_size__ (16)));
+
+ __m128d _mm_addsub_pd (__m128d __X, __m128d __Y)
+ {
+ return (__m128d) __builtin_ia32_addsubpd ((__v2df)__X, (__v2df)__Y);
+ }
+ } "-O2 -msse3" ]
+}
+
+# Return 1 if ssse3 instructions can be compiled.
+proc check_effective_target_ssse3 { } {
+ return [check_no_compiler_messages ssse3 object {
+ typedef long long __m128i __attribute__ ((__vector_size__ (16)));
+ typedef int __v4si __attribute__ ((__vector_size__ (16)));
+
+ __m128i _mm_abs_epi32 (__m128i __X)
+ {
+ return (__m128i) __builtin_ia32_pabsd128 ((__v4si)__X);
+ }
+ } "-O2 -mssse3" ]
+}
+
+# Return 1 if aes instructions can be compiled.
+proc check_effective_target_aes { } {
+ return [check_no_compiler_messages aes object {
+ typedef long long __m128i __attribute__ ((__vector_size__ (16)));
+ typedef long long __v2di __attribute__ ((__vector_size__ (16)));
+
+ __m128i _mm_aesimc_si128 (__m128i __X)
+ {
+ return (__m128i) __builtin_ia32_aesimc128 ((__v2di)__X);
+ }
+ } "-O2 -maes" ]
+}
+
+# Return 1 if vaes instructions can be compiled.
+proc check_effective_target_vaes { } {
+ return [check_no_compiler_messages vaes object {
+ typedef long long __m128i __attribute__ ((__vector_size__ (16)));
+ typedef long long __v2di __attribute__ ((__vector_size__ (16)));
+
+ __m128i _mm_aesimc_si128 (__m128i __X)
+ {
+ return (__m128i) __builtin_ia32_aesimc128 ((__v2di)__X);
+ }
+ } "-O2 -maes -mavx" ]
+}
+
+# Return 1 if pclmul instructions can be compiled.
+proc check_effective_target_pclmul { } {
+ return [check_no_compiler_messages pclmul object {
+ typedef long long __m128i __attribute__ ((__vector_size__ (16)));
+ typedef long long __v2di __attribute__ ((__vector_size__ (16)));
+
+ __m128i pclmulqdq_test (__m128i __X, __m128i __Y)
+ {
+ return (__m128i) __builtin_ia32_pclmulqdq128 ((__v2di)__X,
+ (__v2di)__Y,
+ 1);
+ }
+ } "-O2 -mpclmul" ]
+}
+
+# Return 1 if vpclmul instructions can be compiled.
+proc check_effective_target_vpclmul { } {
+ return [check_no_compiler_messages vpclmul object {
+ typedef long long __m128i __attribute__ ((__vector_size__ (16)));
+ typedef long long __v2di __attribute__ ((__vector_size__ (16)));
+
+ __m128i pclmulqdq_test (__m128i __X, __m128i __Y)
+ {
+ return (__m128i) __builtin_ia32_pclmulqdq128 ((__v2di)__X,
+ (__v2di)__Y,
+ 1);
+ }
+ } "-O2 -mpclmul -mavx" ]
+}
+
+# Return 1 if sse4a instructions can be compiled.
+proc check_effective_target_sse4a { } {
+ return [check_no_compiler_messages sse4a object {
+ typedef long long __m128i __attribute__ ((__vector_size__ (16)));
+ typedef long long __v2di __attribute__ ((__vector_size__ (16)));
+
+ __m128i _mm_insert_si64 (__m128i __X,__m128i __Y)
+ {
+ return (__m128i) __builtin_ia32_insertq ((__v2di)__X, (__v2di)__Y);
+ }
+ } "-O2 -msse4a" ]
+}
+
+# Return 1 if fma4 instructions can be compiled.
+proc check_effective_target_fma4 { } {
+ return [check_no_compiler_messages fma4 object {
+ typedef float __m128 __attribute__ ((__vector_size__ (16)));
+ typedef float __v4sf __attribute__ ((__vector_size__ (16)));
+ __m128 _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C)
+ {
+ return (__m128) __builtin_ia32_vfmaddps ((__v4sf)__A,
+ (__v4sf)__B,
+ (__v4sf)__C);
+ }
+ } "-O2 -mfma4" ]
+}
+
+# Return 1 if fma instructions can be compiled.
+proc check_effective_target_fma { } {
+ return [check_no_compiler_messages fma object {
+ typedef float __m128 __attribute__ ((__vector_size__ (16)));
+ typedef float __v4sf __attribute__ ((__vector_size__ (16)));
+ __m128 _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C)
+ {
+ return (__m128) __builtin_ia32_vfmaddps ((__v4sf)__A,
+ (__v4sf)__B,
+ (__v4sf)__C);
+ }
+ } "-O2 -mfma" ]
+}
+
+# Return 1 if xop instructions can be compiled.
+proc check_effective_target_xop { } {
+ return [check_no_compiler_messages xop object {
+ typedef long long __m128i __attribute__ ((__vector_size__ (16)));
+ typedef short __v8hi __attribute__ ((__vector_size__ (16)));
+ __m128i _mm_maccs_epi16(__m128i __A, __m128i __B, __m128i __C)
+ {
+ return (__m128i) __builtin_ia32_vpmacssww ((__v8hi)__A,
+ (__v8hi)__B,
+ (__v8hi)__C);
+ }
+ } "-O2 -mxop" ]
+}
+
+# Return 1 if lzcnt instruction can be compiled.
+proc check_effective_target_lzcnt { } {
+ return [check_no_compiler_messages lzcnt object {
+ unsigned short _lzcnt (unsigned short __X)
+ {
+ return __builtin_clzs (__X);
+ }
+ } "-mlzcnt" ]
+}
+
+# Return 1 if bmi instructions can be compiled.
+proc check_effective_target_bmi { } {
+ return [check_no_compiler_messages bmi object {
+ unsigned int __bextr_u32 (unsigned int __X, unsigned int __Y)
+ {
+ return __builtin_ia32_bextr_u32 (__X, __Y);
+ }
+ } "-mbmi" ]
+}
+
+# Return 1 if ADX instructions can be compiled.
+proc check_effective_target_adx { } {
+ return [check_no_compiler_messages adx object {
+ unsigned char
+ _adxcarry_u32 (unsigned char __CF, unsigned int __X,
+ unsigned int __Y, unsigned int *__P)
+ {
+ return __builtin_ia32_addcarryx_u32 (__CF, __X, __Y, __P);
+ }
+ } "-madx" ]
+}
+
+# Return 1 if rtm instructions can be compiled.
+proc check_effective_target_rtm { } {
+ return [check_no_compiler_messages rtm object {
+ void
+ _rtm_xend (void)
+ {
+ return __builtin_ia32_xend ();
+ }
+ } "-mrtm" ]
+}
+
+# Return 1 if avx512vl instructions can be compiled.
+proc check_effective_target_avx512vl { } {
+ return [check_no_compiler_messages avx512vl object {
+ typedef long long __v4di __attribute__ ((__vector_size__ (32)));
+ __v4di
+ mm256_and_epi64 (__v4di __X, __v4di __Y)
+ {
+ __v4di __W;
+ return __builtin_ia32_pandq256_mask (__X, __Y, __W, -1);
+ }
+ } "-mavx512vl" ]
+}
+
+# Return 1 if avx512cd instructions can be compiled.
+proc check_effective_target_avx512cd { } {
+ return [check_no_compiler_messages avx512cd_trans object {
+ typedef long long __v8di __attribute__ ((__vector_size__ (64)));
+ __v8di
+ _mm512_conflict_epi64 (__v8di __W, __v8di __A)
+ {
+ return (__v8di) __builtin_ia32_vpconflictdi_512_mask ((__v8di) __A,
+ (__v8di) __W,
+ -1);
+ }
+ } "-Wno-psabi -mavx512cd" ]
+}
+
+# Return 1 if avx512er instructions can be compiled.
+proc check_effective_target_avx512er { } {
+ return [check_no_compiler_messages avx512er_trans object {
+ typedef float __v16sf __attribute__ ((__vector_size__ (64)));
+ __v16sf
+ mm512_exp2a23_ps (__v16sf __X)
+ {
+ return __builtin_ia32_exp2ps_mask (__X, __X, -1, 4);
+ }
+ } "-Wno-psabi -mavx512er" ]
+}
+
+# Return 1 if sha instructions can be compiled.
+proc check_effective_target_sha { } {
+ return [check_no_compiler_messages sha object {
+ typedef long long __m128i __attribute__ ((__vector_size__ (16)));
+ typedef int __v4si __attribute__ ((__vector_size__ (16)));
+
+ __m128i _mm_sha1msg1_epu32 (__m128i __X, __m128i __Y)
+ {
+ return (__m128i) __builtin_ia32_sha1msg1 ((__v4si)__X,
+ (__v4si)__Y);
+ }
+ } "-O2 -msha" ]
+}
+
+# Return 1 if avx512dq instructions can be compiled.
+proc check_effective_target_avx512dq { } {
+ return [check_no_compiler_messages avx512dq object {
+ typedef long long __v8di __attribute__ ((__vector_size__ (64)));
+ __v8di
+ _mm512_mask_mullo_epi64 (__v8di __W, __v8di __A, __v8di __B)
+ {
+ return (__v8di) __builtin_ia32_pmullq512_mask ((__v8di) __A,
+ (__v8di) __B,
+ (__v8di) __W,
+ -1);
+ }
+ } "-mavx512dq" ]
+}
+
+# Return 1 if avx512bw instructions can be compiled.
+proc check_effective_target_avx512bw { } {
+ return [check_no_compiler_messages avx512bw object {
+ typedef short __v32hi __attribute__ ((__vector_size__ (64)));
+ __v32hi
+ _mm512_mask_mulhrs_epi16 (__v32hi __W, __v32hi __A, __v32hi __B)
+ {
+ return (__v32hi) __builtin_ia32_pmulhrsw512_mask ((__v32hi) __A,
+ (__v32hi) __B,
+ (__v32hi) __W,
+ -1);
+ }
+ } "-mavx512bw" ]
+}
+
+# Return 1 if avx512ifma instructions can be compiled.
+proc check_effective_target_avx512ifma { } {
+ return [check_no_compiler_messages avx512ifma object {
+ typedef long long __v8di __attribute__ ((__vector_size__ (64)));
+ __v8di
+ _mm512_madd52lo_epu64 (__v8di __X, __v8di __Y, __v8di __Z)
+ {
+ return (__v8di) __builtin_ia32_vpmadd52luq512_mask ((__v8di) __X,
+ (__v8di) __Y,
+ (__v8di) __Z,
+ -1);
+ }
+ } "-mavx512ifma" ]
+}
+
+# Return 1 if avx512vbmi instructions can be compiled.
+proc check_effective_target_avx512vbmi { } {
+ return [check_no_compiler_messages avx512vbmi object {
+ typedef char __v64qi __attribute__ ((__vector_size__ (64)));
+ __v64qi
+ _mm512_multishift_epi64_epi8 (__v64qi __X, __v64qi __Y)
+ {
+ return (__v64qi) __builtin_ia32_vpmultishiftqb512_mask ((__v64qi) __X,
+ (__v64qi) __Y,
+ (__v64qi) __Y,
+ -1);
+ }
+ } "-mavx512vbmi" ]
+}
+
+# Return 1 if avx512_4fmaps instructions can be compiled.
+proc check_effective_target_avx5124fmaps { } {
+ return [check_no_compiler_messages avx5124fmaps object {
+ typedef float __v16sf __attribute__ ((__vector_size__ (64)));
+ typedef float __v4sf __attribute__ ((__vector_size__ (16)));
+
+ __v16sf
+ _mm512_mask_4fmadd_ps (__v16sf __DEST, __v16sf __A, __v16sf __B, __v16sf __C,
+ __v16sf __D, __v16sf __E, __v4sf *__F)
+ {
+ return (__v16sf) __builtin_ia32_4fmaddps_mask ((__v16sf) __A,
+ (__v16sf) __B,
+ (__v16sf) __C,
+ (__v16sf) __D,
+ (__v16sf) __E,
+ (const __v4sf *) __F,
+ (__v16sf) __DEST,
+ 0xffff);
+ }
+ } "-mavx5124fmaps" ]
+}
+
+# Return 1 if avx512_4vnniw instructions can be compiled.
+proc check_effective_target_avx5124vnniw { } {
+ return [check_no_compiler_messages avx5124vnniw object {
+ typedef int __v16si __attribute__ ((__vector_size__ (64)));
+ typedef int __v4si __attribute__ ((__vector_size__ (16)));
+
+ __v16si
+ _mm512_4dpwssd_epi32 (__v16si __A, __v16si __B, __v16si __C,
+ __v16si __D, __v16si __E, __v4si *__F)
+ {
+ return (__v16si) __builtin_ia32_vp4dpwssd ((__v16si) __B,
+ (__v16si) __C,
+ (__v16si) __D,
+ (__v16si) __E,
+ (__v16si) __A,
+ (const __v4si *) __F);
+ }
+ } "-mavx5124vnniw" ]
+}
+
+# Return 1 if avx512_vpopcntdq instructions can be compiled.
+proc check_effective_target_avx512vpopcntdq { } {
+ return [check_no_compiler_messages avx512vpopcntdq object {
+ typedef int __v16si __attribute__ ((__vector_size__ (64)));
+
+ __v16si
+ _mm512_popcnt_epi32 (__v16si __A)
+ {
+ return (__v16si) __builtin_ia32_vpopcountd_v16si ((__v16si) __A);
+ }
+ } "-mavx512vpopcntdq" ]
+}
+
+# Return 1 if 128 or 256-bit avx512_vpopcntdq instructions can be compiled.
+proc check_effective_target_avx512vpopcntdqvl { } {
+ return [check_no_compiler_messages avx512vpopcntdqvl object {
+ typedef int __v8si __attribute__ ((__vector_size__ (32)));
+
+ __v8si
+ _mm256_popcnt_epi32 (__v8si __A)
+ {
+ return (__v8si) __builtin_ia32_vpopcountd_v8si ((__v8si) __A);
+ }
+ } "-mavx512vpopcntdq -mavx512vl" ]
+}
+
+# Return 1 if gfni instructions can be compiled.
+proc check_effective_target_gfni { } {
+ return [check_no_compiler_messages gfni object {
+ typedef char __v16qi __attribute__ ((__vector_size__ (16)));
+
+ __v16qi
+ _mm_gf2p8affineinv_epi64_epi8 (__v16qi __A, __v16qi __B, const int __C)
+ {
+ return (__v16qi) __builtin_ia32_vgf2p8affineinvqb_v16qi ((__v16qi) __A,
+ (__v16qi) __B,
+ 0);
+ }
+ } "-mgfni" ]
+}
+
+# Return 1 if avx512vbmi2 instructions can be compiled.
+proc check_effective_target_avx512vbmi2 { } {
+ return [check_no_compiler_messages avx512vbmi2 object {
+ typedef char __v16qi __attribute__ ((__vector_size__ (16)));
+ typedef unsigned long long __mmask16;
+
+ __v16qi
+ _mm_mask_compress_epi8 (__v16qi __A, __mmask16 __B, __v16qi __C)
+ {
+ return (__v16qi) __builtin_ia32_compressqi128_mask((__v16qi)__C,
+ (__v16qi)__A,
+ (__mmask16)__B);
+ }
+ } "-mavx512vbmi2 -mavx512vl" ]
+}
+
+# Return 1 if avx512vbmi2 instructions can be compiled.
+proc check_effective_target_avx512vnni { } {
+ return [check_no_compiler_messages avx512vnni object {
+ typedef int __v16si __attribute__ ((__vector_size__ (64)));
+
+ __v16si
+ _mm_mask_compress_epi8 (__v16si __A, __v16si __B, __v16si __C)
+ {
+ return (__v16si) __builtin_ia32_vpdpbusd_v16si ((__v16si)__A,
+ (__v16si)__B,
+ (__v16si)__C);
+ }
+ } "-mavx512vnni -mavx512f" ]
+}
+
+# Return 1 if vaes instructions can be compiled.
+proc check_effective_target_avx512vaes { } {
+ return [check_no_compiler_messages avx512vaes object {
+
+ typedef int __v16si __attribute__ ((__vector_size__ (64)));
+
+ __v32qi
+ _mm256_aesdec_epi128 (__v32qi __A, __v32qi __B)
+ {
+ return (__v32qi)__builtin_ia32_vaesdec_v32qi ((__v32qi) __A, (__v32qi) __B);
+ }
+ } "-mvaes" ]
+}
+
+# Return 1 if vpclmulqdq instructions can be compiled.
+proc check_effective_target_vpclmulqdq { } {
+ return [check_no_compiler_messages vpclmulqdq object {
+ typedef long long __v4di __attribute__ ((__vector_size__ (32)));
+
+ __v4di
+ _mm256_clmulepi64_epi128 (__v4di __A, __v4di __B)
+ {
+ return (__v4di) __builtin_ia32_vpclmulqdq_v4di (__A, __B, 0);
+ }
+ } "-mvpclmulqdq -mavx512vl" ]
+}
+
+# Return 1 if avx512_bitalg instructions can be compiled.
+proc check_effective_target_avx512bitalg { } {
+ return [check_no_compiler_messages avx512bitalg object {
+ typedef short int __v32hi __attribute__ ((__vector_size__ (64)));
+
+ __v32hi
+ _mm512_popcnt_epi16 (__v32hi __A)
+ {
+ return (__v32hi) __builtin_ia32_vpopcountw_v32hi ((__v32hi) __A);
+ }
+ } "-mavx512bitalg" ]
+}
+
# Return 1 if C wchar_t type is compatible with char16_t.
proc check_effective_target_wchar_t_char16_t_compatible { } {
projects / gcc.git / commitdiff