more cleanup
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 22 Nov 2018 22:35:59 +0000 (22:35 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 22 Nov 2018 22:35:59 +0000 (22:35 +0000)
cpu_fetch_stage.py

index 3d25d3507cdf8362b5467bbca2cf51240559affe..242e2efca01f76a0b445272c48e6ed89d989c4a5 100644 (file)
@@ -56,18 +56,15 @@ class CPUFetchStage(Module):
         fetch_pc = Signal(32, reset=reset_vector)
 
         self.sync += If(fetch_action != fetch_action_wait,
-                        output_pc.eq(fetch_pc)).
-                     Else( output_pc.eq(output_pc)) # hmmm...
-        #self.sync += output_pc.eq((fetch_action == `fetch_action_wait) ?
-        #                          output_pc : fetch_pc);
+                        output_pc.eq(fetch_pc))
 
         memory_interface_fetch_address = fetch_pc[2:]
 
         initial output_pc <= reset_vector;
         initial output_state <= `fetch_output_state_empty;
 
-        delayed_instruction = Signal(32, reset=0);
-        delayed_instruction_valid = Signal(reset=0);
+        delayed_instruction = Signal(32, reset=0)
+        delayed_instruction_valid = Signal(reset=0)
 
         self.sync += delayed_instruction.eq(output_instruction)
         self.sync += output_state.eq(fetch_output_state_empty)