Not supported by hardware, uses same mechanism as base vertex.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3162>
                }
                dst[0] = ctx->basevertex;
                break;
+       case nir_intrinsic_load_base_instance:
+               if (!ctx->base_instance) {
+                       ctx->base_instance = create_driver_param(ctx, IR3_DP_INSTID_BASE);
+               }
+               dst[0] = ctx->base_instance;
+               break;
        case nir_intrinsic_load_vertex_id_zero_base:
        case nir_intrinsic_load_vertex_id:
                if (!ctx->vertex_id) {
 
        struct ir3_instruction *frag_face, *frag_coord;
 
        /* For vertex shaders, keep track of the system values sources */
-       struct ir3_instruction *vertex_id, *basevertex, *instance_id;
+       struct ir3_instruction *vertex_id, *basevertex, *instance_id, *base_instance;
 
        /* For fragment shaders: */
        struct ir3_instruction *samp_id, *samp_mask_in;
 
                                        layout->num_driver_params =
                                                MAX2(layout->num_driver_params, IR3_DP_VTXID_BASE + 1);
                                        break;
+                               case nir_intrinsic_load_base_instance:
+                                       layout->num_driver_params =
+                                               MAX2(layout->num_driver_params, IR3_DP_INSTID_BASE + 1);
+                                       break;
                                case nir_intrinsic_load_user_clip_plane:
                                        layout->num_driver_params =
                                                MAX2(layout->num_driver_params, IR3_DP_UCP7_W + 1);
 
        /* vertex shader driver params: */
        IR3_DP_VTXID_BASE = 0,
        IR3_DP_VTXCNT_MAX = 1,
+       IR3_DP_INSTID_BASE = 2,
        /* user-clip-plane components, up to 8x vec4's: */
        IR3_DP_UCP0_X     = 4,
        /* .... */