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+Date: Wed, 20 May 2020 04:10:19 +0000
+X-Bugzilla-Reason: CC
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+X-Bugzilla-Product: Libre-SOC's first SoC
+X-Bugzilla-Component: Source Code
+X-Bugzilla-Version: unspecified
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+X-Bugzilla-Severity: enhancement
+X-Bugzilla-Who: lkcl@lkcl.net
+X-Bugzilla-Status: CONFIRMED
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+X-Bugzilla-Assigned-To: mtnolan2640@gmail.com
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+Message-ID: <bug-319-13-alLDlwEJas@https.bugs.libre-soc.org/>
+In-Reply-To: <bug-319-13@https.bugs.libre-soc.org/>
+References: <bug-319-13@https.bugs.libre-soc.org/>
+X-Bugzilla-URL: https://bugs.libre-soc.org/
+Auto-Submitted: auto-generated
+MIME-Version: 1.0
+Subject: [libre-riscv-dev] [Bug 319] POWER9 setting carry (and other) XER
+ flags
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