mem-ruby: Add support for MemSync reqs in VIPER

Change-Id: Ib129e82be5348c641a8ae18093324bcedfb38abe
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/29939
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
Tested-by: kokoro <noreply+kokoro@google.com>

diff --git a/src/mem/ruby/system/GPUCoalescer.cc b/src/mem/ruby/system/GPUCoalescer.cc
index d9793fafd63b1032f2629952b483f24de96b53a5..80bc19a64739dfd9b64ddb612250db47010c7fd1 100644 (file)
--- a/src/mem/ruby/system/GPUCoalescer.cc
+++ b/src/mem/ruby/system/GPUCoalescer.cc
@@ -553,24 +553,25 @@ GPUCoalescer::makeRequest(PacketPtr pkt)
     assert(pkt->req->hasInstSeqNum());
 
     if (pkt->cmd == MemCmd::MemSyncReq) {
-        // let the child coalescer handle MemSyncReq because this is
-        // cache coherence protocol specific
-        return RequestStatus_Issued;
-    }
-    // otherwise, this must be either read or write command
-    assert(pkt->isRead() || pkt->isWrite());
-
-    // the pkt is temporarily stored in the uncoalesced table until
-    // it's picked for coalescing process later in this cycle or in a
-    // future cycle
-    uncoalescedTable.insertPacket(pkt);
-    DPRINTF(GPUCoalescer, "Put pkt with addr 0x%X to uncoalescedTable\n",
-            pkt->getAddr());
-
-    // we schedule an issue event here to process the uncoalesced table
-    // and try to issue Ruby request to cache system
-    if (!issueEvent.scheduled()) {
-        schedule(issueEvent, curTick());
+        // issue mem_sync requests immediately to the cache system without
+        // going through uncoalescedTable like normal LD/ST/Atomic requests
+        issueMemSyncRequest(pkt);
+    } else {
+        // otherwise, this must be either read or write command
+        assert(pkt->isRead() || pkt->isWrite());
+
+        // the pkt is temporarily stored in the uncoalesced table until
+        // it's picked for coalescing process later in this cycle or in a
+        // future cycle
+        uncoalescedTable.insertPacket(pkt);
+        DPRINTF(GPUCoalescer, "Put pkt with addr 0x%X to uncoalescedTable\n",
+                pkt->getAddr());
+
+        // we schedule an issue event here to process the uncoalesced table
+        // and try to issue Ruby request to cache system
+        if (!issueEvent.scheduled()) {
+            schedule(issueEvent, curTick());
+        }
     }
 
     // we always return RequestStatus_Issued in this coalescer

diff --git a/src/mem/ruby/system/GPUCoalescer.hh b/src/mem/ruby/system/GPUCoalescer.hh
index 74236cb36b443124b03cff9cc2e71488a5773a7a..401f70bd485d0983de5e7c442f7a516d44eb2717 100644 (file)
--- a/src/mem/ruby/system/GPUCoalescer.hh
+++ b/src/mem/ruby/system/GPUCoalescer.hh
@@ -367,7 +367,7 @@ class GPUCoalescer : public RubyPort
     // since the two following issue functions are protocol-specific,
     // they must be implemented in a derived coalescer
     virtual void issueRequest(CoalescedRequest* crequest) = 0;
-//    virtual void issueMemSyncRequest(PacketPtr pkt) = 0;
+    virtual void issueMemSyncRequest(PacketPtr pkt) {}
 
     void kernelCallback(int wavefront_id);
 

diff --git a/src/mem/ruby/system/RubyPort.cc b/src/mem/ruby/system/RubyPort.cc
index 0526e65609071f9659972aee62f39652c87a02a4..4510e3a833daf431e941b822ae2b0d55580c4304 100644 (file)
--- a/src/mem/ruby/system/RubyPort.cc
+++ b/src/mem/ruby/system/RubyPort.cc
@@ -251,7 +251,7 @@ RubyPort::MemSlavePort::recvTimingReq(PacketPtr pkt)
     }
     // Check for pio requests and directly send them to the dedicated
     // pio port.
-    if (pkt->cmd != MemCmd::MemFenceReq) {
+    if (pkt->cmd != MemCmd::MemSyncReq) {
         if (!isPhysMemAddress(pkt)) {
             assert(ruby_port->memMasterPort.isConnected());
             DPRINTF(RubyPort, "Request address %#x assumed to be a "
@@ -312,7 +312,7 @@ RubyPort::MemSlavePort::recvAtomic(PacketPtr pkt)
 
     // Check for pio requests and directly send them to the dedicated
     // pio port.
-    if (pkt->cmd != MemCmd::MemFenceReq) {
+    if (pkt->cmd != MemCmd::MemSyncReq) {
         if (!isPhysMemAddress(pkt)) {
             assert(ruby_port->memMasterPort.isConnected());
             DPRINTF(RubyPort, "Request address %#x assumed to be a "
@@ -539,7 +539,7 @@ RubyPort::MemSlavePort::hitCallback(PacketPtr pkt)
     }
 
     // Flush, acquire, release requests don't access physical memory
-    if (pkt->isFlush() || pkt->cmd == MemCmd::MemFenceReq) {
+    if (pkt->isFlush() || pkt->cmd == MemCmd::MemSyncReq) {
         accessPhysMem = false;
     }
 
@@ -649,4 +649,4 @@ RubyPort::functionalWrite(Packet *func_pkt)
         }
     }
     return num_written;
-}
\ No newline at end of file
+}