arc: Avoid generating brcc instructions with limm

BRcc instructions are generated quite late in the compilation
process. These instructions combines a compare with a regular
conditional branch if the result of the compare is not used
anylonger. However, when compiling for size, it is better to avoid
BRcc instructions which are introducing a 32-bit long immediate.

gcc/
2020-12-11  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.c (arc_reorg): Avoid limm in BRcc.

diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
index b80bb9b63a591f4d5158e076e5dd986faeb580df..27bd458537b9e0c67ec1089cdfb4a7cafef5cb10 100644 (file)
--- a/gcc/config/arc/arc.c
+++ b/gcc/config/arc/arc.c
@@ -8589,6 +8589,7 @@ arc_reorg (void)
                  if (!brcc_nolimm_operator (op, VOIDmode)
                      && !long_immediate_operand (op1, VOIDmode)
                      && (TARGET_ARC700
+                         || (TARGET_V2 && optimize_size)
                          || next_active_insn (link_insn) != insn))
                    continue;