* metag-dis.c (REG_WIDTH): Increase to 64.

	* gas/metag/metadsp21.d: Fix expected MMOV disassembly.

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 092db06631e1326612f73f31ae9c68ba1cd9a22e..e9d9dc81263d974c1077cff712f95a036b4f42c9 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2013-01-14  Will Newton <will.newton@imgtec.com>
+
+       * gas/metag/metadsp21.d: Fix expected MMOV disassembly.
+
 2013-01-14  Alan Modra  <amodra@gmail.com>
 
        * gas/ppc/htm.s: Use .text rather than .section ".text".

diff --git a/gas/testsuite/gas/metag/metadsp21.d b/gas/testsuite/gas/metag/metadsp21.d
index d3626e9eed493979b7cb78d6469d83466732b515..1b5681e0848c2b137b71c715b202963b4b05083b 100644 (file)
--- a/gas/testsuite/gas/metag/metadsp21.d
+++ b/gas/testsuite/gas/metag/metadsp21.d
@@ -26203,14 +26203,14 @@ Disassembly of section \.text:
 .*:    03 c1 ff aa     D         XSDW      \[D1BW\.1\+D1BWI\.1\+\+\],\[D1BR\.1\+D1BRI\.1\+\+\]
 .*:    19 c1 ff aa     DL        XSDSB     \[D1BW\.1\+D1BWI\.1\+\+\],\[D1BR\.1\+D1BRI\.1\+\+\]
 .*:    c1 03 b0 ca     DB        MMOVD     RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[D1Re0\+\+\]
-.*:    c1 3f b0 ca     DB        MMOVD     RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RA,\[D1Re0\+\+\]
+.*:    c1 3f b0 ca     DB        MMOVD     RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[D1Re0\+\+\]
 .*:    e1 47 b0 ca     DB        MMOVD     RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[A0FrP\+\+\]
 .*:    a1 c0 b1 ca     DB        MMOVD     RAM8X32,RAM8X32,\[D0\.7\+\+\]
 .*:    a1 c3 b1 ca     DB        MMOVD     RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[D0\.7\+\+\]
 .*:    a1 cf b1 ca     DB        MMOVD     RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[D0\.7\+\+\]
-.*:    a1 ff b1 ca     DB        MMOVD     RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RA,\[D0\.7\+\+\]
+.*:    a1 ff b1 ca     DB        MMOVD     RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[D0\.7\+\+\]
 .*:    e1 03 b2 ca     DB        MMOVD     RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[A0\.8\+\+\]
-.*:    e1 3f b2 ca     DB        MMOVD     RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RA,\[A0\.8\+\+\]
+.*:    e1 3f b2 ca     DB        MMOVD     RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[A0\.8\+\+\]
 .*:    c1 07 b4 ca     DB        MMOVD     RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[D1\.16\+\+\]
 .*:    c1 00 b8 ca     DB        MMOVD     RAM8X,RAM8X,\[D1Re0\+\+\]
 .*:    c1 0f b8 ca     DB        MMOVD     RAM8X,RAM8X,RAM8X,RAM8X,RAM8X,RAM8X,\[D1Re0\+\+\]
@@ -26245,14 +26245,14 @@ Disassembly of section \.text:
 .*:    c1 01 fc ca     DW        MMOVD     RAMX,RAMX,RAMX,\[D1\.16\+\+\]
 .*:    c1 1f fc ca     DW        MMOVD     RAMX,RAMX,RAMX,RAMX,RAMX,RAMX,RAMX,\[D1\.16\+\+\]
 .*:    c1 03 b0 cb     DB        MMOVL     RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[D1Re0\+\+\]
-.*:    c1 3f b0 cb     DB        MMOVL     RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RA,\[D1Re0\+\+\]
+.*:    c1 3f b0 cb     DB        MMOVL     RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[D1Re0\+\+\]
 .*:    e1 47 b0 cb     DB        MMOVL     RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[A0FrP\+\+\]
 .*:    a1 c0 b1 cb     DB        MMOVL     RAM8X32,RAM8X32,\[D0\.7\+\+\]
 .*:    a1 c3 b1 cb     DB        MMOVL     RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[D0\.7\+\+\]
 .*:    a1 cf b1 cb     DB        MMOVL     RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[D0\.7\+\+\]
-.*:    a1 ff b1 cb     DB        MMOVL     RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RA,\[D0\.7\+\+\]
+.*:    a1 ff b1 cb     DB        MMOVL     RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[D0\.7\+\+\]
 .*:    e1 03 b2 cb     DB        MMOVL     RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[A0\.8\+\+\]
-.*:    e1 3f b2 cb     DB        MMOVL     RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RA,\[A0\.8\+\+\]
+.*:    e1 3f b2 cb     DB        MMOVL     RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[A0\.8\+\+\]
 .*:    c1 07 b4 cb     DB        MMOVL     RAM8X32,RAM8X32,RAM8X32,RAM8X32,RAM8X32,\[D1\.16\+\+\]
 .*:    c1 00 b8 cb     DB        MMOVL     RAM8X,RAM8X,\[D1Re0\+\+\]
 .*:    c1 0f b8 cb     DB        MMOVL     RAM8X,RAM8X,RAM8X,RAM8X,RAM8X,RAM8X,\[D1Re0\+\+\]

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index c8d19e97ccf307b79685b02c45ab0d0402763bde..6ccf7acdd50359ddd5777853cfdf2c23e71adc91 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2013-01-14  Will Newton <will.newton@imgtec.com>
+
+       * metag-dis.c (REG_WIDTH): Increase to 64.
+
 2013-01-10  Peter Bergner <bergner@vnet.ibm.com>
 
        * ppc-dis.c (ppc_opts): Add "power8", "pwr8" and "htm" entries.

diff --git a/opcodes/metag-dis.c b/opcodes/metag-dis.c
index 8a03a92ec5369ea2ceb22308db4ce29c93660863..447f6de6a1d8c2e8f8fe3cb09c146e3505818c23 100644 (file)
--- a/opcodes/metag-dis.c
+++ b/opcodes/metag-dis.c
@@ -33,7 +33,7 @@
 
 #define OPERAND_WIDTH   92
 #define ADDR_WIDTH      20
-#define REG_WIDTH       50
+#define REG_WIDTH       64
 #define DSP_PREFIX_WIDTH 17
 
 /* Value to print if we fail to parse a register name.  */