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Added English language description for addic instruction
author
Shriya Sharma
<shriya@redsemiconductor.com>
Wed, 22 Nov 2023 14:17:03 +0000
(14:17 +0000)
committer
Shriya Sharma
<shriya@redsemiconductor.com>
Wed, 22 Nov 2023 14:17:03 +0000
(14:17 +0000)
openpower/isa/fixedarith.mdwn
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diff --git
a/openpower/isa/fixedarith.mdwn
b/openpower/isa/fixedarith.mdwn
index 328c00bb1ad0a2911df6bc0dff128ee4870e1b95..a02a8dff41c080b6f330bc294d1a6eb3f580b12c 100644
(file)
--- a/
openpower/isa/fixedarith.mdwn
+++ b/
openpower/isa/fixedarith.mdwn
@@
-131,6
+131,10
@@
Pseudo-code:
RT <- (RA) + EXTS(SI)
+Description:
+
+ The sum (RA) + SI is placed into register RT.
+
Special Registers Altered:
CR0 CA CA32