+2015-10-09 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
+
+ PR target/67366
+ * config/arm/arm.md (movmisalign<mode>): New.
+ * config/arm/iterators.md (HSI): New.
+
2015-10-09 Richard Biener <rguenther@suse.de>
PR tree-optimization/67891
}"
)
+;; movmisalign patterns for HImode and SImode.
+(define_expand "movmisalign<mode>"
+ [(match_operand:HSI 0 "general_operand")
+ (match_operand:HSI 1 "general_operand")]
+ "unaligned_access"
+{
+ /* This pattern is not permitted to fail during expansion: if both arguments
+ are non-registers (e.g. memory := constant), force operand 1 into a
+ register. */
+ rtx (* gen_unaligned_load)(rtx, rtx);
+ rtx tmp_dest = operands[0];
+ if (!s_register_operand (operands[0], <MODE>mode)
+ && !s_register_operand (operands[1], <MODE>mode))
+ operands[1] = force_reg (<MODE>mode, operands[1]);
+
+ if (<MODE>mode == HImode)
+ {
+ gen_unaligned_load = gen_unaligned_loadhiu;
+ tmp_dest = gen_reg_rtx (SImode);
+ }
+ else
+ gen_unaligned_load = gen_unaligned_loadsi;
+
+ if (MEM_P (operands[1]))
+ {
+ emit_insn (gen_unaligned_load (tmp_dest, operands[1]));
+ if (<MODE>mode == HImode)
+ emit_move_insn (operands[0], gen_lowpart (HImode, tmp_dest));
+ }
+ else
+ emit_insn (gen_unaligned_store<mode> (operands[0], operands[1]));
+
+ DONE;
+})
+
;; Vector bits common to IWMMXT and Neon
(include "vec-common.md")
;; Load the Intel Wireless Multimedia Extension patterns
;; A list of integer modes that are up to one word long
(define_mode_iterator QHSI [QI HI SI])
+;; A list of integer modes that are half and one word long
+(define_mode_iterator HSI [HI SI])
+
;; A list of integer modes that are less than a word
(define_mode_iterator NARROW [QI HI])