Add CSRRx/CSRRxI test

diff --git a/isa/rv64si/Makefrag b/isa/rv64si/Makefrag
index 285b7fd212c2ce77adf570dc1dbfe5abed1c31b1..83bf22dd2e261eb02f644682eb8f6190ad49205a 100644 (file)
--- a/isa/rv64si/Makefrag
+++ b/isa/rv64si/Makefrag
@@ -4,6 +4,7 @@
 
 rv64si_sc_tests = \
        coreid \
+       csr \
 
 rv64si_mc_tests = \
        ipi \

diff --git a/isa/rv64si/coreid.S b/isa/rv64si/coreid.S
index ed33f117cf49c86bcc62e6b39b094e9d9a79284a..cb2367efe7b8439124504e4d99c2ae83da893b48 100644 (file)
--- a/isa/rv64si/coreid.S
+++ b/isa/rv64si/coreid.S
@@ -15,7 +15,7 @@ RVTEST_CODE_BEGIN
   # Basic tests
   #-------------------------------------------------------------
 
-  TEST_CASE( 2, x1, 0x0, csrr x1, hartid );
+  TEST_CASE( 2, x1, 0x0, li x1, 1; csrr x1, hartid );
 
   TEST_PASSFAIL
 

diff --git a/isa/rv64si/csr.S b/isa/rv64si/csr.S
new file mode 100644 (file)
index 0000000..26031bc
--- /dev/null
+++ b/isa/rv64si/csr.S
@@ -0,0 +1,33 @@
+#*****************************************************************************
+# csr.S
+#-----------------------------------------------------------------------------
+#
+# Test CSRRx and CSRRxI instructions.
+#
+
+#include "riscv_test.h"
+#include "test_macros.h"
+
+RVTEST_RV64S
+RVTEST_CODE_BEGIN
+
+  csrwi sup0, 3
+  TEST_CASE( 2, a0,         3, csrr a0, sup0);
+  TEST_CASE( 3, a1,         3, csrrci a1, sup0, 1);
+  TEST_CASE( 4, a2,         2, csrrsi a2, sup0, 4);
+  TEST_CASE( 5, a3,         6, csrrwi a3, sup0, 2);
+  TEST_CASE( 6, a1,         2, li a0, 0xbad1dea; csrrw a1, sup0, a0);
+  TEST_CASE( 7, a0, 0xbad1dea, li a0, 0x0001dea; csrrc a0, sup0, a0);
+  TEST_CASE( 8, a0, 0xbad0000, li a0, 0x000beef; csrrs a0, sup0, a0);
+  TEST_CASE( 9, a0, 0xbadbeef, csrr a0, sup0);
+
+  TEST_PASSFAIL
+
+RVTEST_CODE_END
+
+  .data
+RVTEST_DATA_BEGIN
+
+  TEST_DATA
+
+RVTEST_DATA_END