+2004-05-31 Eric Botcazou <ebotcazou@libertysurf.fr>
+
+ PR target/15693
+ * config/sparc/sparc.c (compare_operand): New predicate.
+ * config/sparc/sparc.h (PREDICATE_CODES): Add it.
+ * config/sparc/sparc.md (cmpsi expander): Use it. If the first
+ operand is a ZERO_EXTRACT and the second operand is not zero,
+ force the former to a register.
+ (cmpdi expander): Likewise.
+
2004-05-31 Geoffrey Keating <geoffk@apple.com>
* gengtype-lex.l: Catch stray GTY markers in the files gengtype
return 0;
}
+/* Return 1 if OP is valid for the lhs of a compare insn. */
+
+int
+compare_operand (rtx op, enum machine_mode mode)
+{
+ if (GET_CODE (op) == ZERO_EXTRACT)
+ return (register_operand (XEXP (op, 0), mode)
+ && small_int_or_double (XEXP (op, 1), mode)
+ && small_int_or_double (XEXP (op, 2), mode)
+ /* This matches cmp_zero_extract. */
+ && ((mode == SImode
+ && ((GET_CODE (XEXP (op, 2)) == CONST_INT
+ && INTVAL (XEXP (op, 2)) > 19)
+ || (GET_CODE (XEXP (op, 2)) == CONST_DOUBLE
+ && CONST_DOUBLE_LOW (XEXP (op, 2)) > 19)))
+ /* This matches cmp_zero_extract_sp64. */
+ || (mode == DImode
+ && TARGET_ARCH64
+ && ((GET_CODE (XEXP (op, 2)) == CONST_INT
+ && INTVAL (XEXP (op, 2)) > 51)
+ || (GET_CODE (XEXP (op, 2)) == CONST_DOUBLE
+ && CONST_DOUBLE_LOW (XEXP (op, 2)) > 51)))));
+ else
+ return register_operand (op, mode);
+}
+
\f
/* We know it can't be done in one insn when we get here,
the movsi expander guarantees this. */
{"uns_arith_operand", {SUBREG, REG, CONST_INT}}, \
{"clobbered_register", {REG}}, \
{"input_operand", {SUBREG, REG, CONST_INT, MEM, CONST}}, \
+{"compare_operand", {SUBREG, REG, ZERO_EXTRACT}}, \
{"const64_operand", {CONST_INT, CONST_DOUBLE}}, \
{"const64_high_operand", {CONST_INT, CONST_DOUBLE}}, \
{"tgd_symbolic_operand", {SYMBOL_REF}}, \
(define_expand "cmpsi"
[(set (reg:CC 100)
- (compare:CC (match_operand:SI 0 "register_operand" "")
+ (compare:CC (match_operand:SI 0 "compare_operand" "")
(match_operand:SI 1 "arith_operand" "")))]
""
{
+ if (GET_CODE (operands[0]) == ZERO_EXTRACT && operands[1] != const0_rtx)
+ operands[0] = force_reg (SImode, operands[0]);
+
sparc_compare_op0 = operands[0];
sparc_compare_op1 = operands[1];
DONE;
(define_expand "cmpdi"
[(set (reg:CCX 100)
- (compare:CCX (match_operand:DI 0 "register_operand" "")
+ (compare:CCX (match_operand:DI 0 "compare_operand" "")
(match_operand:DI 1 "arith_double_operand" "")))]
"TARGET_ARCH64"
{
+ if (GET_CODE (operands[0]) == ZERO_EXTRACT && operands[1] != const0_rtx)
+ operands[0] = force_reg (DImode, operands[0]);
+
sparc_compare_op0 = operands[0];
sparc_compare_op1 = operands[1];
DONE;
+2004-05-31 Eric Botcazou <ebotcazou@libertysurf.fr>
+
+ * gcc.dg/sparc-trap-1.c: New test.
+
2004-05-31 Roger Sayle <roger@eyesopen.com>
PR middle-end/15069
--- /dev/null
+/* PR target/15693 */
+/* { dg-do compile { target sparc*-*-* } } */
+/* { dg-options "-O2" } */
+
+/* This used to fail on SPARC at -O2 because the combiner
+ produces a compare insn that was not rematched by the
+ compare expander. */
+
+static __inline__ __attribute__ ((always_inline))
+int page_mapping (unsigned flags)
+{
+ if (1u & (flags >> 16))
+ return 1;
+ return 0;
+}
+void install_page (unsigned flags)
+{
+ if (__builtin_expect (!page_mapping (flags), 0))
+ __builtin_trap ();
+}