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diff --git a/openpower/sv/svp_rewrite/svp64.mdwn b/openpower/sv/svp_rewrite/svp64.mdwn
index 60f834077cd704038c50eb4c5f6d36100082e8d0..e88b050791a5897c58e15150e0517faddf4509a2 100644 (file)
--- a/openpower/sv/svp_rewrite/svp64.mdwn
+++ b/openpower/sv/svp_rewrite/svp64.mdwn
@@ -449,7 +449,7 @@ so FP instructions with Rc=1 write to CR[1] aka SVCR1_000.
 
 CRs are not stored in SPRs: they are registers in their own right.
 Theregore context-switching the full set of CRs involves a Vectorised
-mfcr or mtcr, using VL=64, elwidth=8 to do so.
+mfcr or mtcr, using VL=64, elwidth=8 to do so.  This is exactly as how scalar OpenPOWER context-switches CRs: it is just that there are now more of them.
 
 The 64 SV CRs are arranged similarly to the way the 128 integer registers
 are arranged.  TODO a python program that auto-generates a CSV file