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MIPS16/opcodes: Make the handling of BREAK and SDBBP consistent
authorMaciej W. Rozycki <macro@imgtec.com>
Fri, 12 May 2017 00:09:36 +0000 (01:09 +0100)
committerMaciej W. Rozycki <macro@imgtec.com>
Fri, 12 May 2017 00:12:10 +0000 (01:12 +0100)
Disassemble the MIPS16 BREAK and SDBBP instruction's immediate operand
in the hexadecimal rather than decimal numeral system and add respective
operandless variants with an implicit 0 operand, making our handling of
these instructions consistent with how we have processed their regular
MIPS and microMIPS counterparts since forever.

opcodes/
* mips16-opc.c (decode_mips16_operand) <'6'>: Switch the operand
type to hexadecimal.
(mips16_opcodes): Add operandless "break" and "sdbbp" entries.

binutils/
* testsuite/binutils-all/mips/mips16-extend-insn.d: Adjust BREAK
and SDBBP disassembly.

gas/
* testsuite/gas/mips/mips16.d: Adjust BREAK disassembly.
* testsuite/gas/mips/mips16-64@mips16.d: Likewise.
* testsuite/gas/mips/mips16-64.d: Likewise.
* testsuite/gas/mips/mips16-64@mips16-64.d: Likewise.
* testsuite/gas/mips/mips16-macro.d: Likewise.
* testsuite/gas/mips/mips16-64@mips16-macro.d: Likewise.
* testsuite/gas/mips/mips16-sub.d: Likewise.
* testsuite/gas/mips/mips16-32@mips16-sub.d: Likewise.

13 files changed:
binutils/ChangeLog patch | blob | history
binutils/testsuite/binutils-all/mips/mips16-extend-insn.d patch | blob | history
gas/ChangeLog patch | blob | history
gas/testsuite/gas/mips/mips16-32@mips16-sub.d patch | blob | history
gas/testsuite/gas/mips/mips16-64.d patch | blob | history
gas/testsuite/gas/mips/mips16-64@mips16-64.d patch | blob | history
gas/testsuite/gas/mips/mips16-64@mips16-macro.d patch | blob | history
gas/testsuite/gas/mips/mips16-64@mips16.d patch | blob | history
gas/testsuite/gas/mips/mips16-macro.d patch | blob | history
gas/testsuite/gas/mips/mips16-sub.d patch | blob | history
gas/testsuite/gas/mips/mips16.d patch | blob | history
opcodes/ChangeLog patch | blob | history
opcodes/mips16-opc.c patch | blob | history

diff --git a/binutils/ChangeLog b/binutils/ChangeLog
index e47d825798a7104ee897263dc62114049c7769ad..5e51572b465abb154bc5d2b2a20721abf755d56d 100644 (file)
--- a/binutils/ChangeLog
+++ b/binutils/ChangeLog
@@ -1,3 +1,8 @@
+2017-05-12  Maciej W. Rozycki  <macro@imgtec.com>
+
+       * testsuite/binutils-all/mips/mips16-extend-insn.d: Adjust BREAK
+       and SDBBP disassembly.
+
 2017-05-10  Maciej W. Rozycki  <macro@imgtec.com>
 
        * testsuite/binutils-all/mips/mips.exp: Define `tempfile' and
diff --git a/binutils/testsuite/binutils-all/mips/mips16-extend-insn.d b/binutils/testsuite/binutils-all/mips/mips16-extend-insn.d
index ef4f5a49d4ec8af4cf9f7ecf6d6a8f0c62edec00..a962320fdfcd5b199dbea0e1708f2d397d774761 100644 (file)
--- a/binutils/testsuite/binutils-all/mips/mips16-extend-insn.d
+++ b/binutils/testsuite/binutils-all/mips/mips16-extend-insn.d
@@ -215,7 +215,7 @@ Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> f123         extend  0x123
 [0-9a-f]+ <[^>]*> e8c0         jalrc   s0
 [0-9a-f]+ <[^>]*> f123         extend  0x123
-[0-9a-f]+ <[^>]*> e801         sdbbp   0
+[0-9a-f]+ <[^>]*> e801         sdbbp
 [0-9a-f]+ <[^>]*> f123         extend  0x123
 [0-9a-f]+ <[^>]*> e802         slt     s0,s0
 [0-9a-f]+ <[^>]*> f123         extend  0x123
@@ -223,7 +223,7 @@ Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> f123         extend  0x123
 [0-9a-f]+ <[^>]*> e804         sllv    s0,s0
 [0-9a-f]+ <[^>]*> f123         extend  0x123
-[0-9a-f]+ <[^>]*> e805         break   0
+[0-9a-f]+ <[^>]*> e805         break
 [0-9a-f]+ <[^>]*> f123         extend  0x123
 [0-9a-f]+ <[^>]*> e806         srlv    s0,s0
 [0-9a-f]+ <[^>]*> f123         extend  0x123
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 63ca633a64ecbc1b726eb204b1eac65f1172adab..559e9e5ae9254e87801739ac65f154f7983ea174 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,14 @@
+2017-05-12  Maciej W. Rozycki  <macro@imgtec.com>
+
+       * testsuite/gas/mips/mips16.d: Adjust BREAK disassembly.
+       * testsuite/gas/mips/mips16-64@mips16.d: Likewise.
+       * testsuite/gas/mips/mips16-64.d: Likewise.
+       * testsuite/gas/mips/mips16-64@mips16-64.d: Likewise.
+       * testsuite/gas/mips/mips16-macro.d: Likewise.
+       * testsuite/gas/mips/mips16-64@mips16-macro.d: Likewise.
+       * testsuite/gas/mips/mips16-sub.d: Likewise.
+       * testsuite/gas/mips/mips16-32@mips16-sub.d: Likewise.
+
 2017-05-11  Maciej W. Rozycki  <macro@imgtec.com>
 
        * testsuite/gas/mips/mips32r2-sync-1.d: New test.
diff --git a/gas/testsuite/gas/mips/mips16-32@mips16-sub.d b/gas/testsuite/gas/mips/mips16-32@mips16-sub.d
index 83750ae3e6735147546ebd7849ffdcd40fe5ba90..1ecdfbbde5da950193aab32a3fa8fe62ed3ec3db 100644 (file)
--- a/gas/testsuite/gas/mips/mips16-32@mips16-sub.d
+++ b/gas/testsuite/gas/mips/mips16-32@mips16-sub.d
@@ -757,13 +757,13 @@ Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> ea7d         0xea7d
 [0-9a-f]+ <[^>]*> ea7e         0xea7e
 [0-9a-f]+ <[^>]*> 2b01         bnez    v1,000007d4 <insns2\+0xb4>
-[0-9a-f]+ <[^>]*> e8e5         break   7
+[0-9a-f]+ <[^>]*> e8e5         break   0x7
 [0-9a-f]+ <[^>]*> ea12         mflo    v0
 [0-9a-f]+ <[^>]*> 6500         nop
 [0-9a-f]+ <[^>]*> 6500         nop
 [0-9a-f]+ <[^>]*> ea7f         0xea7f
 [0-9a-f]+ <[^>]*> 2b01         bnez    v1,000007e0 <insns2\+0xc0>
-[0-9a-f]+ <[^>]*> e8e5         break   7
+[0-9a-f]+ <[^>]*> e8e5         break   0x7
 [0-9a-f]+ <[^>]*> ea12         mflo    v0
 [0-9a-f]+ <[^>]*> 6500         nop
 [0-9a-f]+ <[^>]*> 6500         nop
@@ -771,13 +771,13 @@ Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> ea79         multu   v0,v1
 [0-9a-f]+ <[^>]*> ea7a         div     zero,v0,v1
 [0-9a-f]+ <[^>]*> 2b01         bnez    v1,000007f0 <insns2\+0xd0>
-[0-9a-f]+ <[^>]*> e8e5         break   7
+[0-9a-f]+ <[^>]*> e8e5         break   0x7
 [0-9a-f]+ <[^>]*> ea12         mflo    v0
 [0-9a-f]+ <[^>]*> 6500         nop
 [0-9a-f]+ <[^>]*> 6500         nop
 [0-9a-f]+ <[^>]*> ea7b         divu    zero,v0,v1
 [0-9a-f]+ <[^>]*> 2b01         bnez    v1,000007fc <insns2\+0xdc>
-[0-9a-f]+ <[^>]*> e8e5         break   7
+[0-9a-f]+ <[^>]*> e8e5         break   0x7
 [0-9a-f]+ <[^>]*> ea12         mflo    v0
 [0-9a-f]+ <[^>]*> ea00         jr      v0
 [0-9a-f]+ <[^>]*> 6500         nop
@@ -805,9 +805,9 @@ Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> 176f         b       00000720 <insns2>
 [0-9a-f]+ <[^>]*> 1012         b       00000868 <bar>
 [0-9a-f]+ <[^>]*> 1075         b       00000930 <iuux>
-[0-9a-f]+ <[^>]*> e805         break   0
-[0-9a-f]+ <[^>]*> e825         break   1
-[0-9a-f]+ <[^>]*> efe5         break   63
+[0-9a-f]+ <[^>]*> e805         break
+[0-9a-f]+ <[^>]*> e825         break   0x1
+[0-9a-f]+ <[^>]*> efe5         break   0x3f
 [0-9a-f]+ <[^>]*> 1800 0000    jal     00000000 <data1>
 [      ]*[0-9a-f]+: R_MIPS16_26        extern
 [0-9a-f]+ <[^>]*> 6500         nop
diff --git a/gas/testsuite/gas/mips/mips16-64.d b/gas/testsuite/gas/mips/mips16-64.d
index 5a8c0f768918ba781c11d3e3da03c2a96f0a7513..0eb7d9fcc01be9cadcc5ea0900b5cf83b5fa108e 100644 (file)
--- a/gas/testsuite/gas/mips/mips16-64.d
+++ b/gas/testsuite/gas/mips/mips16-64.d
@@ -614,21 +614,21 @@ Disassembly of section .text:
  7cc:  ea7d            dmultu  v0,v1
  7ce:  ea7e            ddiv    zero,v0,v1
  7d0:  2b01            bnez    v1,7d4 <insns2\+(0x|)b4>
- 7d2:  e8e5            break   7
+ 7d2:  e8e5            break   0x7
  7d4:  ea12            mflo    v0
  7d6:  ea7f            ddivu   zero,v0,v1
  7d8:  2b01            bnez    v1,7dc <insns2\+(0x|)bc>
- 7da:  e8e5            break   7
+ 7da:  e8e5            break   0x7
  7dc:  ea12            mflo    v0
  7de:  ea78            mult    v0,v1
  7e0:  ea79            multu   v0,v1
  7e2:  ea7a            div     zero,v0,v1
  7e4:  2b01            bnez    v1,7e8 <insns2\+(0x|)c8>
- 7e6:  e8e5            break   7
+ 7e6:  e8e5            break   0x7
  7e8:  ea12            mflo    v0
  7ea:  ea7b            divu    zero,v0,v1
  7ec:  2b01            bnez    v1,7f0 <insns2\+(0x|)d0>
- 7ee:  e8e5            break   7
+ 7ee:  e8e5            break   0x7
  7f0:  ea12            mflo    v0
  7f2:  ea80            jrc     v0
  7f4:  e8a0            jrc     ra
@@ -653,9 +653,9 @@ Disassembly of section .text:
  828:  177b            b       720 <insns2>
  82a:  1012            b       850 <bar>
  82c:  1075            b       918 <iuux>
- 82e:  e805            break   0
- 830:  e825            break   1
- 832:  efe5            break   63
+ 82e:  e805            break
+ 830:  e825            break   0x1
+ 832:  efe5            break   0x3f
  834:  1800 0000       jal     0 <data1>
                        834: R_MIPS16_26        extern
                        834: R_MIPS_NONE        \*ABS\*
diff --git a/gas/testsuite/gas/mips/mips16-64@mips16-64.d b/gas/testsuite/gas/mips/mips16-64@mips16-64.d
index 68621428fdac63262fd065b0ee787ffa56c03821..2aaf073b1d0fa74073b953516ad63d3f7a640b31 100644 (file)
--- a/gas/testsuite/gas/mips/mips16-64@mips16-64.d
+++ b/gas/testsuite/gas/mips/mips16-64@mips16-64.d
@@ -614,13 +614,13 @@ Disassembly of section .text:
  7cc:  ea7d            dmultu  v0,v1
  7ce:  ea7e            ddiv    zero,v0,v1
  7d0:  2b01            bnez    v1,7d4 <insns2\+(0x|)b4>
- 7d2:  e8e5            break   7
+ 7d2:  e8e5            break   0x7
  7d4:  ea12            mflo    v0
  7d6:  6500            nop
  7d8:  6500            nop
  7da:  ea7f            ddivu   zero,v0,v1
  7dc:  2b01            bnez    v1,7e0 <insns2\+(0x|)c0>
- 7de:  e8e5            break   7
+ 7de:  e8e5            break   0x7
  7e0:  ea12            mflo    v0
  7e2:  6500            nop
  7e4:  6500            nop
@@ -628,13 +628,13 @@ Disassembly of section .text:
  7e8:  ea79            multu   v0,v1
  7ea:  ea7a            div     zero,v0,v1
  7ec:  2b01            bnez    v1,7f0 <insns2\+(0x|)d0>
- 7ee:  e8e5            break   7
+ 7ee:  e8e5            break   0x7
  7f0:  ea12            mflo    v0
  7f2:  6500            nop
  7f4:  6500            nop
  7f6:  ea7b            divu    zero,v0,v1
  7f8:  2b01            bnez    v1,7fc <insns2\+(0x|)dc>
- 7fa:  e8e5            break   7
+ 7fa:  e8e5            break   0x7
  7fc:  ea12            mflo    v0
  7fe:  ea00            jr      v0
  800:  6500            nop
@@ -662,9 +662,9 @@ Disassembly of section .text:
  840:  176f            b       720 <insns2>
  842:  1012            b       868 <bar>
  844:  1075            b       930 <iuux>
- 846:  e805            break   0
- 848:  e825            break   1
- 84a:  efe5            break   63
+ 846:  e805            break
+ 848:  e825            break   0x1
+ 84a:  efe5            break   0x3f
  84c:  1800 0000       jal     0 <data1>
                        84c: R_MIPS16_26        extern
                        84c: R_MIPS_NONE        \*ABS\*
diff --git a/gas/testsuite/gas/mips/mips16-64@mips16-macro.d b/gas/testsuite/gas/mips/mips16-64@mips16-macro.d
index 323685ba42b6607cb237845d76a3a6852a1512fe..45cf7e801e5a9426ef49b797d0e1a391678351af 100644 (file)
--- a/gas/testsuite/gas/mips/mips16-64@mips16-macro.d
+++ b/gas/testsuite/gas/mips/mips16-64@mips16-macro.d
@@ -11,49 +11,49 @@ Disassembly of section \.text:
 [ 0-9a-f]+ <foo>:
 [ 0-9a-f]+:    eb9a            div     \$0,\$3,\$4
 [ 0-9a-f]+:    2c01            bnez    \$4,[0-9a-f]+ <[^>]*>
-[ 0-9a-f]+:    e8e5            break   7
+[ 0-9a-f]+:    e8e5            break   0x7
 [ 0-9a-f]+:    ea12            mflo    \$2
 [ 0-9a-f]+:    6500            nop
 [ 0-9a-f]+:    6500            nop
 [ 0-9a-f]+:    ecbb            divu    \$0,\$4,\$5
 [ 0-9a-f]+:    2d01            bnez    \$5,[0-9a-f]+ <[^>]*>
-[ 0-9a-f]+:    e8e5            break   7
+[ 0-9a-f]+:    e8e5            break   0x7
 [ 0-9a-f]+:    eb12            mflo    \$3
 [ 0-9a-f]+:    6500            nop
 [ 0-9a-f]+:    6500            nop
 [ 0-9a-f]+:    edde            ddiv    \$0,\$5,\$6
 [ 0-9a-f]+:    2e01            bnez    \$6,[0-9a-f]+ <[^>]*>
-[ 0-9a-f]+:    e8e5            break   7
+[ 0-9a-f]+:    e8e5            break   0x7
 [ 0-9a-f]+:    ec12            mflo    \$4
 [ 0-9a-f]+:    6500            nop
 [ 0-9a-f]+:    6500            nop
 [ 0-9a-f]+:    eeff            ddivu   \$0,\$6,\$7
 [ 0-9a-f]+:    2f01            bnez    \$7,[0-9a-f]+ <[^>]*>
-[ 0-9a-f]+:    e8e5            break   7
+[ 0-9a-f]+:    e8e5            break   0x7
 [ 0-9a-f]+:    ed12            mflo    \$5
 [ 0-9a-f]+:    6500            nop
 [ 0-9a-f]+:    6500            nop
 [ 0-9a-f]+:    ef1a            div     \$0,\$7,\$16
 [ 0-9a-f]+:    2801            bnez    \$16,[0-9a-f]+ <[^>]*>
-[ 0-9a-f]+:    e8e5            break   7
+[ 0-9a-f]+:    e8e5            break   0x7
 [ 0-9a-f]+:    ee10            mfhi    \$6
 [ 0-9a-f]+:    6500            nop
 [ 0-9a-f]+:    6500            nop
 [ 0-9a-f]+:    ef3b            divu    \$0,\$7,\$17
 [ 0-9a-f]+:    2901            bnez    \$17,[0-9a-f]+ <[^>]*>
-[ 0-9a-f]+:    e8e5            break   7
+[ 0-9a-f]+:    e8e5            break   0x7
 [ 0-9a-f]+:    ee10            mfhi    \$6
 [ 0-9a-f]+:    6500            nop
 [ 0-9a-f]+:    6500            nop
 [ 0-9a-f]+:    eb9e            ddiv    \$0,\$3,\$4
 [ 0-9a-f]+:    2c01            bnez    \$4,[0-9a-f]+ <[^>]*>
-[ 0-9a-f]+:    e8e5            break   7
+[ 0-9a-f]+:    e8e5            break   0x7
 [ 0-9a-f]+:    ea10            mfhi    \$2
 [ 0-9a-f]+:    6500            nop
 [ 0-9a-f]+:    6500            nop
 [ 0-9a-f]+:    ecbf            ddivu   \$0,\$4,\$5
 [ 0-9a-f]+:    2d01            bnez    \$5,[0-9a-f]+ <[^>]*>
-[ 0-9a-f]+:    e8e5            break   7
+[ 0-9a-f]+:    e8e5            break   0x7
 [ 0-9a-f]+:    eb10            mfhi    \$3
 [ 0-9a-f]+:    6500            nop
 [ 0-9a-f]+:    6500            nop
diff --git a/gas/testsuite/gas/mips/mips16-64@mips16.d b/gas/testsuite/gas/mips/mips16-64@mips16.d
index c5e3267dbd9906f76c685fdbf85a7eeb681a65ee..f56e641a15ebdff2fd7731a47f13a5990f07db87 100644 (file)
--- a/gas/testsuite/gas/mips/mips16-64@mips16.d
+++ b/gas/testsuite/gas/mips/mips16-64@mips16.d
@@ -614,13 +614,13 @@ Disassembly of section .text:
  7cc:  ea7d            dmultu  v0,v1
  7ce:  ea7e            ddiv    zero,v0,v1
  7d0:  2b01            bnez    v1,7d4 <insns2\+(0x|)b4>
- 7d2:  e8e5            break   7
+ 7d2:  e8e5            break   0x7
  7d4:  ea12            mflo    v0
  7d6:  6500            nop
  7d8:  6500            nop
  7da:  ea7f            ddivu   zero,v0,v1
  7dc:  2b01            bnez    v1,7e0 <insns2\+(0x|)c0>
- 7de:  e8e5            break   7
+ 7de:  e8e5            break   0x7
  7e0:  ea12            mflo    v0
  7e2:  6500            nop
  7e4:  6500            nop
@@ -628,13 +628,13 @@ Disassembly of section .text:
  7e8:  ea79            multu   v0,v1
  7ea:  ea7a            div     zero,v0,v1
  7ec:  2b01            bnez    v1,7f0 <insns2\+(0x|)d0>
- 7ee:  e8e5            break   7
+ 7ee:  e8e5            break   0x7
  7f0:  ea12            mflo    v0
  7f2:  6500            nop
  7f4:  6500            nop
  7f6:  ea7b            divu    zero,v0,v1
  7f8:  2b01            bnez    v1,7fc <insns2\+(0x|)dc>
- 7fa:  e8e5            break   7
+ 7fa:  e8e5            break   0x7
  7fc:  ea12            mflo    v0
  7fe:  ea00            jr      v0
  800:  6500            nop
@@ -662,9 +662,9 @@ Disassembly of section .text:
  840:  176f            b       720 <insns2>
  842:  1012            b       868 <bar>
  844:  1075            b       930 <iuux>
- 846:  e805            break   0
- 848:  e825            break   1
- 84a:  efe5            break   63
+ 846:  e805            break
+ 848:  e825            break   0x1
+ 84a:  efe5            break   0x3f
  84c:  1800 0000       jal     0 <data1>
                        84c: R_MIPS16_26        extern
  850:  6500            nop
diff --git a/gas/testsuite/gas/mips/mips16-macro.d b/gas/testsuite/gas/mips/mips16-macro.d
index cf05682cda391723f0f1b748af9e797a39e1eefc..50bff5f85e3692648daa6a83c0b6a5893e476337 100644 (file)
--- a/gas/testsuite/gas/mips/mips16-macro.d
+++ b/gas/testsuite/gas/mips/mips16-macro.d
@@ -10,35 +10,35 @@ Disassembly of section \.text:
 [ 0-9a-f]+ <foo>:
 [ 0-9a-f]+:    eb9a            div     \$0,\$3,\$4
 [ 0-9a-f]+:    2c01            bnez    \$4,[0-9a-f]+ <[^>]*>
-[ 0-9a-f]+:    e8e5            break   7
+[ 0-9a-f]+:    e8e5            break   0x7
 [ 0-9a-f]+:    ea12            mflo    \$2
 [ 0-9a-f]+:    ecbb            divu    \$0,\$4,\$5
 [ 0-9a-f]+:    2d01            bnez    \$5,[0-9a-f]+ <[^>]*>
-[ 0-9a-f]+:    e8e5            break   7
+[ 0-9a-f]+:    e8e5            break   0x7
 [ 0-9a-f]+:    eb12            mflo    \$3
 [ 0-9a-f]+:    edde            ddiv    \$0,\$5,\$6
 [ 0-9a-f]+:    2e01            bnez    \$6,[0-9a-f]+ <[^>]*>
-[ 0-9a-f]+:    e8e5            break   7
+[ 0-9a-f]+:    e8e5            break   0x7
 [ 0-9a-f]+:    ec12            mflo    \$4
 [ 0-9a-f]+:    eeff            ddivu   \$0,\$6,\$7
 [ 0-9a-f]+:    2f01            bnez    \$7,[0-9a-f]+ <[^>]*>
-[ 0-9a-f]+:    e8e5            break   7
+[ 0-9a-f]+:    e8e5            break   0x7
 [ 0-9a-f]+:    ed12            mflo    \$5
 [ 0-9a-f]+:    ef1a            div     \$0,\$7,\$16
 [ 0-9a-f]+:    2801            bnez    \$16,[0-9a-f]+ <[^>]*>
-[ 0-9a-f]+:    e8e5            break   7
+[ 0-9a-f]+:    e8e5            break   0x7
 [ 0-9a-f]+:    ee10            mfhi    \$6
 [ 0-9a-f]+:    ef3b            divu    \$0,\$7,\$17
 [ 0-9a-f]+:    2901            bnez    \$17,[0-9a-f]+ <[^>]*>
-[ 0-9a-f]+:    e8e5            break   7
+[ 0-9a-f]+:    e8e5            break   0x7
 [ 0-9a-f]+:    ee10            mfhi    \$6
 [ 0-9a-f]+:    eb9e            ddiv    \$0,\$3,\$4
 [ 0-9a-f]+:    2c01            bnez    \$4,[0-9a-f]+ <[^>]*>
-[ 0-9a-f]+:    e8e5            break   7
+[ 0-9a-f]+:    e8e5            break   0x7
 [ 0-9a-f]+:    ea10            mfhi    \$2
 [ 0-9a-f]+:    ecbf            ddivu   \$0,\$4,\$5
 [ 0-9a-f]+:    2d01            bnez    \$5,[0-9a-f]+ <[^>]*>
-[ 0-9a-f]+:    e8e5            break   7
+[ 0-9a-f]+:    e8e5            break   0x7
 [ 0-9a-f]+:    eb10            mfhi    \$3
 [ 0-9a-f]+:    edd9            multu   \$5,\$6
 [ 0-9a-f]+:    ec12            mflo    \$4
diff --git a/gas/testsuite/gas/mips/mips16-sub.d b/gas/testsuite/gas/mips/mips16-sub.d
index 0ccae665646680b51b3aaebc00b734b1c24a2815..bcb42b9fef5ad45138cb302d9d79082dafff843d 100644 (file)
--- a/gas/testsuite/gas/mips/mips16-sub.d
+++ b/gas/testsuite/gas/mips/mips16-sub.d
@@ -603,13 +603,13 @@ Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> ea7d         dmultu  v0,v1
 [0-9a-f]+ <[^>]*> ea7e         ddiv    zero,v0,v1
 [0-9a-f]+ <[^>]*> 2b01         bnez    v1,000007d4 <insns2\+0xb4>
-[0-9a-f]+ <[^>]*> e8e5         break   7
+[0-9a-f]+ <[^>]*> e8e5         break   0x7
 [0-9a-f]+ <[^>]*> ea12         mflo    v0
 [0-9a-f]+ <[^>]*> 6500         nop
 [0-9a-f]+ <[^>]*> 6500         nop
 [0-9a-f]+ <[^>]*> ea7f         ddivu   zero,v0,v1
 [0-9a-f]+ <[^>]*> 2b01         bnez    v1,000007e0 <insns2\+0xc0>
-[0-9a-f]+ <[^>]*> e8e5         break   7
+[0-9a-f]+ <[^>]*> e8e5         break   0x7
 [0-9a-f]+ <[^>]*> ea12         mflo    v0
 [0-9a-f]+ <[^>]*> 6500         nop
 [0-9a-f]+ <[^>]*> 6500         nop
@@ -617,13 +617,13 @@ Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> ea79         multu   v0,v1
 [0-9a-f]+ <[^>]*> ea7a         div     zero,v0,v1
 [0-9a-f]+ <[^>]*> 2b01         bnez    v1,000007f0 <insns2\+0xd0>
-[0-9a-f]+ <[^>]*> e8e5         break   7
+[0-9a-f]+ <[^>]*> e8e5         break   0x7
 [0-9a-f]+ <[^>]*> ea12         mflo    v0
 [0-9a-f]+ <[^>]*> 6500         nop
 [0-9a-f]+ <[^>]*> 6500         nop
 [0-9a-f]+ <[^>]*> ea7b         divu    zero,v0,v1
 [0-9a-f]+ <[^>]*> 2b01         bnez    v1,000007fc <insns2\+0xdc>
-[0-9a-f]+ <[^>]*> e8e5         break   7
+[0-9a-f]+ <[^>]*> e8e5         break   0x7
 [0-9a-f]+ <[^>]*> ea12         mflo    v0
 [0-9a-f]+ <[^>]*> ea00         jr      v0
 [0-9a-f]+ <[^>]*> 6500         nop
@@ -651,9 +651,9 @@ Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> 176f         b       00000720 <insns2>
 [0-9a-f]+ <[^>]*> 1012         b       00000868 <bar>
 [0-9a-f]+ <[^>]*> 1075         b       00000930 <iuux>
-[0-9a-f]+ <[^>]*> e805         break   0
-[0-9a-f]+ <[^>]*> e825         break   1
-[0-9a-f]+ <[^>]*> efe5         break   63
+[0-9a-f]+ <[^>]*> e805         break
+[0-9a-f]+ <[^>]*> e825         break   0x1
+[0-9a-f]+ <[^>]*> efe5         break   0x3f
 [0-9a-f]+ <[^>]*> 1800 0000    jal     00000000 <data1>
 [      ]*[0-9a-f]+: R_MIPS16_26        extern
 [0-9a-f]+ <[^>]*> 6500         nop
diff --git a/gas/testsuite/gas/mips/mips16.d b/gas/testsuite/gas/mips/mips16.d
index 62dbc701d809d9d27a9670312e5ed9b8e0e02a80..32033e8b69ac344895cc5939a353dff8449c4fbc 100644 (file)
--- a/gas/testsuite/gas/mips/mips16.d
+++ b/gas/testsuite/gas/mips/mips16.d
@@ -613,21 +613,21 @@ Disassembly of section .text:
  7cc:  ea7d            dmultu  v0,v1
  7ce:  ea7e            ddiv    zero,v0,v1
  7d0:  2b01            bnez    v1,7d4 <insns2\+(0x|)b4>
- 7d2:  e8e5            break   7
+ 7d2:  e8e5            break   0x7
  7d4:  ea12            mflo    v0
  7d6:  ea7f            ddivu   zero,v0,v1
  7d8:  2b01            bnez    v1,7dc <insns2\+(0x|)bc>
- 7da:  e8e5            break   7
+ 7da:  e8e5            break   0x7
  7dc:  ea12            mflo    v0
  7de:  ea78            mult    v0,v1
  7e0:  ea79            multu   v0,v1
  7e2:  ea7a            div     zero,v0,v1
  7e4:  2b01            bnez    v1,7e8 <insns2\+(0x|)c8>
- 7e6:  e8e5            break   7
+ 7e6:  e8e5            break   0x7
  7e8:  ea12            mflo    v0
  7ea:  ea7b            divu    zero,v0,v1
  7ec:  2b01            bnez    v1,7f0 <insns2\+(0x|)d0>
- 7ee:  e8e5            break   7
+ 7ee:  e8e5            break   0x7
  7f0:  ea12            mflo    v0
  7f2:  ea80            jrc     v0
  7f4:  e8a0            jrc     ra
@@ -652,9 +652,9 @@ Disassembly of section .text:
  828:  177b            b       720 <insns2>
  82a:  1012            b       850 <bar>
  82c:  1075            b       918 <iuux>
- 82e:  e805            break   0
- 830:  e825            break   1
- 832:  efe5            break   63
+ 82e:  e805            break
+ 830:  e825            break   0x1
+ 832:  efe5            break   0x3f
  834:  1800 0000       jal     0 <data1>
                        834: R_MIPS16_26        extern
  838:  6500            nop
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 770b65da97952a5f07d95d0e4a048c3860d9f313..02408b238b69a3da31aec07e35fa4c0a209d3dde 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+2017-05-12  Maciej W. Rozycki  <macro@imgtec.com>
+
+       * mips16-opc.c (decode_mips16_operand) <'6'>: Switch the operand
+       type to hexadecimal.
+       (mips16_opcodes): Add operandless "break" and "sdbbp" entries.
+
 2017-05-11  Maciej W. Rozycki  <macro@imgtec.com>
 
        * mips-opc.c (mips_builtin_opcodes): Mark "synciobdma", "syncs",
diff --git a/opcodes/mips16-opc.c b/opcodes/mips16-opc.c
index 7c8a0be16e8a4fc63478cd232cc2dc2e567d24ff..29e9d9d312eca88b9496d86a9bfdbc87fac30953 100644 (file)
--- a/opcodes/mips16-opc.c
+++ b/opcodes/mips16-opc.c
@@ -56,7 +56,7 @@ decode_mips16_operand (char type, bfd_boolean extended_p)
     case '2': HINT (3, 8);
     case '3': HINT (5, 16);
     case '4': HINT (3, 21);
-    case '6': UINT (6, 5);
+    case '6': HINT (6, 5);
 
     case 'L': SPECIAL (6, 5, ENTRY_EXIT_LIST);
     case 'M': SPECIAL (7, 0, SAVE_RESTORE_LIST);
@@ -230,6 +230,7 @@ const struct mips_opcode mips16_opcodes[] =
 {"bne",            "x,y,p",    0, (int) M_BNE,         INSN_MACRO,             0,              I1,     0,      0 },
 {"bne",     "x,I,p",   0, (int) M_BNE_I,       INSN_MACRO,             0,              I1,     0,      0 },
 {"bnez",    "x,p",     0x2800, 0xf800,         RD_1,                   CBR,            I1,     0,      0 },
+{"break",   "",                0xe805, 0xffff,         TRAP,                   SH,             I1,     0,      0 },
 {"break",   "6",       0xe805, 0xf81f,         TRAP,                   SH,             I1,     0,      0 },
 {"bteqz",   "p",       0x6000, 0xff00,         RD_T,                   CBR,            I1,     0,      0 },
 {"btnez",   "p",       0x6100, 0xff00,         RD_T,                   CBR,            I1,     0,      0 },
@@ -358,6 +359,7 @@ const struct mips_opcode mips16_opcodes[] =
   /* MIPS16e additions; see above for compact jumps.  */
 {"restore", "M",       0x6400, 0xff80,         WR_31|NODS,             MOD_SP,         I32,    0,      0 },
 {"save",    "m",       0x6480, 0xff80,         NODS,                   RD_31|MOD_SP,   I32,    0,      0 },
+{"sdbbp",   "",                0xe801, 0xffff,         TRAP,                   SH,             I32,    0,      0 },
 {"sdbbp",   "6",       0xe801, 0xf81f,         TRAP,                   SH,             I32,    0,      0 },
 {"seb",            "x",        0xe891, 0xf8ff,         MOD_1,                  SH,             I32,    0,      0 },
 {"seh",            "x",        0xe8b1, 0xf8ff,         MOD_1,                  SH,             I32,    0,      0 },