radeon/vce: add proper CPB backtrack

Remember what frames we encoded at which position.

Signed-off-by: Christian König <christian.koenig@amd.com>

diff --git a/src/gallium/drivers/radeon/radeon_vce.c b/src/gallium/drivers/radeon/radeon_vce.c
index 012b4f8e13e757d77fa7bce929e8748a0340d781..a7dfcda481650f0f2c8b3e7d812e1b45daae132b 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_vce.c
+++ b/src/gallium/drivers/radeon/radeon_vce.c
@@ -79,6 +79,57 @@ static void dump_feedback(struct rvce_encoder *enc, struct rvid_buffer *fb)
 }
 #endif
 
+/**
+ * reset the CPB handling
+ */
+static void reset_cpb(struct rvce_encoder *enc)
+{
+       unsigned i;
+
+       LIST_INITHEAD(&enc->cpb_slots);
+       for (i = 0; i < RVCE_NUM_CPB_FRAMES; ++i) {
+               struct rvce_cpb_slot *slot = &enc->cpb_array[i];
+               slot->index = i;
+               slot->picture_type = PIPE_H264_ENC_PICTURE_TYPE_SKIP;
+               slot->frame_num = 0;
+               slot->pic_order_cnt = 0;
+               LIST_ADDTAIL(&slot->list, &enc->cpb_slots);
+       }
+}
+
+/**
+ * sort l0 and l1 to the top of the list
+ */
+static void sort_cpb(struct rvce_encoder *enc)
+{
+       struct rvce_cpb_slot *i, *l0 = NULL, *l1 = NULL;
+
+       LIST_FOR_EACH_ENTRY(i, &enc->cpb_slots, list) {
+               if (i->frame_num == enc->pic.ref_idx_l0)
+                       l0 = i;
+
+               if (i->frame_num == enc->pic.ref_idx_l1)
+                       l1 = i;
+
+               if (enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P && l0)
+                       break;
+
+               if (enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_B &&
+                   l0 && l1)
+                       break;
+       }
+
+       if (l1) {
+               LIST_DEL(&l1->list);
+               LIST_ADD(&l1->list, &enc->cpb_slots);
+       }
+
+       if (l0) {
+               LIST_DEL(&l0->list);
+               LIST_ADD(&l0->list, &enc->cpb_slots);
+       }
+}
+
 /**
  * destroy this video encoder
  */
@@ -97,6 +148,7 @@ static void rvce_destroy(struct pipe_video_codec *encoder)
        }
        rvid_destroy_buffer(&enc->cpb);
        enc->ws->cs_destroy(enc->cs);
+       FREE(enc->cpb_array);
        FREE(enc);
 }
 
@@ -118,6 +170,12 @@ static void rvce_begin_frame(struct pipe_video_codec *encoder,
 
        enc->get_buffer(vid_buf->resources[0], &enc->handle, &enc->luma);
        enc->get_buffer(vid_buf->resources[1], NULL, &enc->chroma);
+
+       if (pic->picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR)
+               reset_cpb(enc);
+       else if (pic->picture_type == PIPE_H264_ENC_PICTURE_TYPE_P ||
+                pic->picture_type == PIPE_H264_ENC_PICTURE_TYPE_B)
+               sort_cpb(enc);
        
        if (!enc->stream_handle) {
                struct rvid_buffer fb;
@@ -167,7 +225,17 @@ static void rvce_end_frame(struct pipe_video_codec *encoder,
                           struct pipe_picture_desc *picture)
 {
        struct rvce_encoder *enc = (struct rvce_encoder*)encoder;
+       struct rvce_cpb_slot *slot = LIST_ENTRY(
+               struct rvce_cpb_slot, enc->cpb_slots.prev, list);
+
        flush(enc);
+
+       /* update the CPB backtrack with the just encoded frame */
+       LIST_DEL(&slot->list);
+       slot->picture_type = enc->pic.picture_type;
+       slot->frame_num = enc->pic.frame_num;
+       slot->pic_order_cnt = enc->pic.pic_order_cnt;
+       LIST_ADD(&slot->list, &enc->cpb_slots);
 }
 
 static void rvce_get_feedback(struct pipe_video_codec *encoder,
@@ -213,7 +281,7 @@ struct pipe_video_codec *rvce_create_encoder(struct pipe_context *context,
        struct rvce_encoder *enc;
        struct pipe_video_buffer *tmp_buf, templat = {};
        struct radeon_surface *tmp_surf;
-       unsigned pitch, vpitch;
+       unsigned cpb_size;
 
        if (!rscreen->info.vce_fw_version) {
                RVID_ERR("Kernel doesn't supports VCE!\n");
@@ -258,16 +326,22 @@ struct pipe_video_codec *rvce_create_encoder(struct pipe_context *context,
        }
 
        get_buffer(((struct vl_video_buffer *)tmp_buf)->resources[0], NULL, &tmp_surf);
-       pitch = align(tmp_surf->level[0].pitch_bytes, 128);
-       vpitch = align(tmp_surf->npix_y, 16);
+       cpb_size = align(tmp_surf->level[0].pitch_bytes, 128);
+       cpb_size = cpb_size * align(tmp_surf->npix_y, 16);
+       cpb_size = cpb_size * 3 / 2;
+       cpb_size = cpb_size * RVCE_NUM_CPB_FRAMES;
        tmp_buf->destroy(tmp_buf);
-       if (!rvid_create_buffer(enc->ws, &enc->cpb,
-                       pitch * vpitch * 1.5 * RVCE_NUM_CPB_FRAMES,
-                       RADEON_DOMAIN_VRAM)) {
+       if (!rvid_create_buffer(enc->ws, &enc->cpb, cpb_size, RADEON_DOMAIN_VRAM)) {
                RVID_ERR("Can't create CPB buffer.\n");
                goto error;
        }
 
+       enc->cpb_array = CALLOC(RVCE_NUM_CPB_FRAMES, sizeof(struct rvce_cpb_slot));
+       if (!enc->cpb_array)
+               goto error;
+
+       reset_cpb(enc);
+
        radeon_vce_40_2_2_init(enc);
 
        return &enc->base;
@@ -278,6 +352,7 @@ error:
 
        rvid_destroy_buffer(&enc->cpb);
 
+       FREE(enc->cpb_array);
        FREE(enc);
        return NULL;
 }

diff --git a/src/gallium/drivers/radeon/radeon_vce.h b/src/gallium/drivers/radeon/radeon_vce.h
index 3ea738b9452018dec6239db249125cf4d4280e26..f815cad38aaa326f66a34de7db215afcd0e34a7a 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_vce.h
+++ b/src/gallium/drivers/radeon/radeon_vce.h
@@ -34,6 +34,8 @@
 #ifndef RADEON_VCE_H
 #define RADEON_VCE_H
 
+#include "util/u_double_list.h"
+
 #define RVCE_RELOC(buf, usage, domain) (enc->ws->cs_add_reloc(enc->cs, (buf), (usage), domain, RADEON_PRIO_MIN))
 
 #define RVCE_CS(value) (enc->cs->buf[enc->cs->cdw++] = (value))
@@ -52,6 +54,16 @@ typedef void (*rvce_get_buffer)(struct pipe_resource *resource,
                                struct radeon_winsys_cs_handle **handle,
                                struct radeon_surface **surface);
 
+/* Coded picture buffer slot */
+struct rvce_cpb_slot {
+       struct list_head                list;
+
+       unsigned                        index;
+       enum pipe_h264_enc_picture_type picture_type;
+       unsigned                        frame_num;
+       unsigned                        pic_order_cnt;
+};
+
 /* VCE encoder representation */
 struct rvce_encoder {
        struct pipe_video_codec         base;
@@ -82,6 +94,9 @@ struct rvce_encoder {
        struct radeon_winsys_cs_handle* bs_handle;
        unsigned                        bs_size;
 
+       struct rvce_cpb_slot            *cpb_array;
+       struct list_head                cpb_slots;
+
        struct rvid_buffer              *fb;
        struct rvid_buffer              cpb;
        struct pipe_h264_enc_picture_desc pic;

diff --git a/src/gallium/drivers/radeon/radeon_vce_40_2_2.c b/src/gallium/drivers/radeon/radeon_vce_40_2_2.c
index 33a58f3e8e90ba38c97e78c6c6538beb6726aa4f..1327d64f983a178a3c53e9f61d43819090dd9a8f 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_vce_40_2_2.c
+++ b/src/gallium/drivers/radeon/radeon_vce_40_2_2.c
@@ -44,6 +44,27 @@
 #include "radeon_video.h"
 #include "radeon_vce.h"
 
+static struct rvce_cpb_slot *current_slot(struct rvce_encoder *enc)
+{
+       return LIST_ENTRY(struct rvce_cpb_slot, enc->cpb_slots.prev, list);
+}
+
+static struct rvce_cpb_slot *l0_slot(struct rvce_encoder *enc)
+{
+       return LIST_ENTRY(struct rvce_cpb_slot, enc->cpb_slots.next, list);
+}
+
+static void frame_offset(struct rvce_encoder *enc, struct rvce_cpb_slot *slot,
+                        unsigned *luma_offset, unsigned *chroma_offset)
+{
+       unsigned pitch = align(enc->luma->level[0].pitch_bytes, 128);
+       unsigned vpitch = align(enc->luma->npix_y, 16);
+       unsigned fsize = pitch * (vpitch + vpitch / 2);
+
+       *luma_offset = slot->index * fsize;
+       *chroma_offset = *luma_offset + pitch * vpitch;
+}
+
 static void session(struct rvce_encoder *enc)
 {
        RVCE_BEGIN(0x00000001); // session cmd
@@ -218,17 +239,6 @@ static void rdo(struct rvce_encoder *enc)
        RVCE_END();
 }
 
-static void frame_offset(struct rvce_encoder *enc, unsigned frame_num,
-                        unsigned *luma_offset, unsigned *chroma_offset)
-{
-       unsigned pitch = align(enc->luma->level[0].pitch_bytes, 128);
-       unsigned vpitch = align(enc->luma->npix_y, 16);
-       unsigned fsize = pitch * (vpitch + vpitch / 2);
-
-       *luma_offset = (frame_num % RVCE_NUM_CPB_FRAMES) * fsize;
-       *chroma_offset = *luma_offset + pitch * vpitch;
-}
-
 static void encode(struct rvce_encoder *enc)
 {
        int i;
@@ -297,11 +307,11 @@ static void encode(struct rvce_encoder *enc)
                RVCE_CS(0xffffffff); // chromaOffset
        }
        else if(enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P) {
-               frame_offset(enc, enc->pic.ref_idx_l0, &luma_offset, &chroma_offset);
-               RVCE_CS(0x00000000); // encPicType
-               // TODO: Stores these in the CPB backtrack
-               RVCE_CS(enc->pic.frame_num - 1); // frameNumber
-               RVCE_CS(enc->pic.frame_num - 1); // pictureOrderCount
+               struct rvce_cpb_slot *l0 = l0_slot(enc);
+               frame_offset(enc, l0, &luma_offset, &chroma_offset);
+               RVCE_CS(l0->picture_type); // encPicType
+               RVCE_CS(l0->frame_num); // frameNumber
+               RVCE_CS(l0->pic_order_cnt); // pictureOrderCount
                RVCE_CS(luma_offset); // lumaOffset
                RVCE_CS(chroma_offset); // chromaOffset
        }
@@ -314,7 +324,7 @@ static void encode(struct rvce_encoder *enc)
                RVCE_CS(0xffffffff); // chromaOffset
        }
        
-       frame_offset(enc, enc->pic.frame_num, &luma_offset, &chroma_offset);
+       frame_offset(enc, current_slot(enc), &luma_offset, &chroma_offset);
        RVCE_CS(luma_offset); // encReconstructedLumaOffset
        RVCE_CS(chroma_offset); // encReconstructedChromaOffset
        RVCE_CS(0x00000000); // encColocBufferOffset